Dimensions
7 Dimensions
7.1 Obtaining package dimensions
Package dimensions are provided in package drawings.
To find a package drawing, go to
and perform a keyword
search for the drawing’s document number:
If you want the drawing for this package
48-pin LQFP
48-pin QFN
Then use this document number
98ASH00962A
98ARH99048A
8 Pinout
8.1 K10 Signal Multiplexing and Pin Assignments
The following table shows the signals available on each pin and the locations of these
pins on the devices supported by this document. The Port Control Module is responsible
for selecting which ALT functionality is available on each pin.
48
LQFP
-QFN
1
2
3
4
5
6
7
8
9
10
11
12
13
Pin Name
Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
VDD
VSS
PTE16
PTE17
PTE18
PTE19
ADC0_DP0
ADC0_DM0
VDDA
VREFH
VREFL
VSSA
VREF_OUT/
CMP1_IN5/
CMP0_IN5
VDD
VSS
ADC0_SE4a
ADC0_SE5a
ADC0_SE6a
ADC0_SE7a
ADC0_DP0
ADC0_DM0
VDDA
VREFH
VREFL
VSSA
VREF_OUT/
CMP1_IN5/
CMP0_IN5
VDD
VSS
ADC0_SE4a
ADC0_SE5a
ADC0_SE6a
ADC0_SE7a
ADC0_DP0
ADC0_DM0
VDDA
VREFH
VREFL
VSSA
VREF_OUT/
CMP1_IN5/
CMP0_IN5
PTE16
PTE17
PTE18
PTE19
SPI0_PCS0
SPI0_SCK
SPI0_SOUT
SPI0_SIN
UART2_TX
UART2_RX
FTM_CLKIN0
FTM_CLKIN1
FTM0_FLT3
LPTMR0_ALT3
UART2_CTS_b I2C0_SDA
UART2_RTS_b I2C0_SCL
K10 Sub-Family Data Sheet, Rev. 4 5/2012.
54
Freescale Semiconductor, Inc.