Pinout
48
LQFP
-QFN
40
41
42
43
44
45
46
Pin Name
Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
PTC7
PTD0/
LLWU_P12
PTD1
PTD2/
LLWU_P13
PTD3
PTD4/
LLWU_P14
PTD5
CMP0_IN1
DISABLED
ADC0_SE5b
DISABLED
DISABLED
DISABLED
ADC0_SE6b
CMP0_IN1
PTC7
PTD0/
LLWU_P12
SPI0_SIN
SPI0_PCS0
SPI0_SCK
SPI0_SOUT
SPI0_SIN
SPI0_PCS1
SPI0_PCS2
UART2_RTS_b
UART2_CTS_b
UART2_RX
UART2_TX
I2S0_RX_FS
ADC0_SE5b
PTD1
PTD2/
LLWU_P13
PTD3
PTD4/
LLWU_P14
UART0_RTS_b FTM0_CH4
UART0_CTS_ FTM0_CH5
b/
UART0_COL_b
UART0_RX
UART0_TX
FTM0_CH6
FTM0_CH7
EWM_IN
EWM_OUT_b
ADC0_SE6b
PTD5
47
48
PTD6/
LLWU_P15
PTD7
ADC0_SE7b
DISABLED
ADC0_SE7b
PTD6/
LLWU_P15
PTD7
SPI0_PCS3
CMT_IRO
FTM0_FLT0
FTM0_FLT1
8.2 K10 Pinouts
The below figure shows the pinout diagram for the devices supported by this document.
Many signals may be multiplexed onto a single pin. To determine what signals can be
used on which pin, see the previous section.
K10 Sub-Family Data Sheet, Rev. 4 5/2012.
56
Freescale Semiconductor, Inc.
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
