Electrical Characteristics
2.1.2
Power Sequencing
The MPC8541Erequires its power rails to be applied in a specific sequence in order to ensure proper device
operation. These requirements are as follows for power up:
1. V
DD
, AV
DDn
2. GV
DD
, LV
DD
, OV
DD
(I/O supplies)
Items on the same line have no ordering requirement with respect to one another. Items on separate lines
must be ordered sequentially such that voltage rails on a previous step must reach 90 percent of their value
before the voltage rails on the current step reach ten percent of theirs.
NOTE
If the items on line 2 must precede items on line 1, please ensure that the
delay will not exceed 500 ms and the power sequence is not done greater
than once per day in production environment.
NOTE
From a system standpoint, if the I/O power supplies ramp prior to the VDD
core supply, the I/Os on the MPC8541E may drive a logic one or zero during
power-up.
2.1.3
Recommended Operating Conditions
provides the recommended operating conditions for the MPC8541E. Note that the values in
are the recommended and tested operating conditions. Proper device operation outside of these
conditions is not guaranteed.
Table 2. Recommended Operating Conditions
Characteristic
Core supply voltage
PLL supply voltage
DDR DRAM I/O voltage
Three-speed Ethernet I/O voltage
PCI, local bus, DUART, system control and power management,
I
2
C, and JTAG I/O voltage
Symbol
V
DD
AV
DD
GV
DD
LV
DD
OV
DD
Recommended Value
1.2 V ± 60 mV
1.3 V± 50 mV (for 1 GHz only)
1.2 V ± 60 mV
1.3 V ± 50 mV (for 1 GHz only)
2.5 V ± 125 mV
3.3 V ± 165 mV
2.5 V ± 125 mV
3.3 V ± 165 mV
Unit
V
V
V
V
V
MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
9
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
