Package and Pin Listings
shows the PCI input AC timing conditions.
CLK
t
PCIVKH
t
PCIXKH
Input
Figure 39. PCI Input AC Timing Measurement Conditions
shows the PCI output AC timing conditions.
CLK
t
PCKHOV
Output Delay
t
PCKHOZ
High-Impedance
Output
Figure 40. PCI Output AC Timing Measurement Condition
14 Package and Pin Listings
This section details package parameters, pin assignments, and dimensions.
14.1
Package Parameters for the MPC8555E FC-PBGA
The package parameters are as provided in the following list. The package type is 29 mm
×
29 mm, 783
flip chip plastic ball grid array (FC-PBGA).
Die size
8.7 mm
×
9.3 mm
×
0.75 mm
Package outline
29 mm
×
29 mm
Interconnects
783
Pitch
1 mm
Minimum module height
Maximum module height
Solder Balls
Ball diameter (typical)
3.07 mm
3.75 mm
62 Sn/36 Pb/2 Ag
0.5 mm
MPC8555E PowerQUICC™ III Integrated Communications Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
55
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
