iC-MA
ANGULAR HALL SENSOR / ENCODER
Rev B3, Page 5/18
ELECTRICAL CHARACTERISTICS
Operating conditions: VDD = 5 V ±10 % , Tj = -40 ... 125 °C, unless otherwise noted
Item
No.
001
002
003
004
005
101
102
103
104
105
106
Symbol
Parameter
Conditions
Min.
VDD
I(VDD)
I(VDD)sb
Supply voltage
Supply current
Standby supply current
open pins, normal operation
open pins, power reduction mode (PRM)
NEN = VDD
VDD > 4 V, see figure 6
VDD < 2.6 V
20
10
10
50
2
-0.2
-3
400
-3
3
0.2
3
100
4.5
Typ.
5
14
7
Max.
5.5
21
14
200
V
mA
mA
µA
µs
µs
kA/m
mm
mm
DEG
µm
DEG
Unit
General
td(VDD)on Turn on delay
td(VDD)off Turn off delay
Hext
dsens
xdis
Φdis
hsens
Aabs
Hall sensor array
Requiered external magnetic field at chip surface
strength
Diameter of Hall sensor array
Displacement of Hall sensor
array to package
see figure 1
DFN10 package, see figure 1
Angular displacement of chip with DFN10 package
reference to package
Distance chip surface to top of
package
Absolute angular position
DFN10 package
Using magnet with 4 mm diameter, centered to
chip, Hext = 20...100 kA/m
on output, with external magnetic field ampli-
tude of 20 kA/m
Signal conditioning
201
202
203
204
205
206
207
208
301
302
303
304
401
402
403
404
501
502
503
504
601
602
603
604
605
Voff
TC(Voff)
Vdc
Ratio
fhc
t()settle
V()gain
V()ampl
AArel
f(OSC)
TC(OSC)
hys
Vt()hi
Vt()lo
V0()
Ri()
Vt()hi
Vt()lo
Vt()hys
Ipu()
Vs()hi
Vs()lo
tr()
tf()
Ilk()
Offset voltage
Temperatur coefficient of offset
voltage
Output mean value
Amplitude ratio of SIN / COS
Cut off frequency
Settling time
Gain output voltage
Sine/Cosine amplitude
Relative angular error
Oscillator frequency
Temperature coefficient of oscilla-
tor frequency
Converter hysteresis
Threshold voltage high
Threshold voltage low
Open circuit voltage
Input resistance
Threshold voltage high
Threshold voltage low
Hysteresis
Pull-up current
Saturation voltage high
Saturation voltage low
Rise time
Fall time
Leackage current
Vt()hys = Vt()hi - Vt()lo
V() = 0...VDD - 1 V
Vs()hi = VDD - V(), I() = -4 mA
I() = 4 mA
CL() = 50 pF
CL() = 50 pF
NEN = high, V() = 0 ... VDD
-5
0.8
100
-240
-120
250
-25
0.4
0.4
60
60
5
60
25
43
45
150
V()ampl = V()max - Vdc
with reference to one periode, see fig. 2
to 70 % amplitude, Hext = 40 kA/m
0.05
0.9
-20
200
256
-0.1
1
78
40
57
750
2
1.0
-50
-50
45
0.95
50
1.00
20
80
150
4.0
1.1
20
300
50
50
55
1.05
kHz
µs
V
V
%
kHz
%/K
LSB
% VDD
% VDD
% VDD
kΩ
V
V
mV
µA
V
V
ns
ns
µA
mV
µV/K
%VDD
Sine-to-digital converter
Configuration inputs CFG1, CFG2, CFG3
Enable input NEN
Digital outputs: A, B, C, D
ICHAUS [ IC-HAUS GMBH ]
