EL4585
maximum modulation capability. The frequency of oscillation
is given by:
1
F = ----------------------
2π LC
T
C C C
2 v
1
C
= --------------------------------------------------------------------------
T
(C C ) + (C C ) + (C C )
1
2
1
V
1 V
Choosing Loop Filter Components
The PLL, VCO, and loop filter can be described as:
FOSC vs VC, LC VCO
5. Now we can solve for C , C , and R :
3
4
3
K K
Where:
(4.77e – 5)(9.06e6)
d
VCO
2
n
C
= ----------------------- = ----------------------------------------------------- = 0.01µF
3
4
3
2
Nω
(1820)(5000)
K = phase detector gain in A/rad
d
C
3
C
R
= ------ = 0.001µF
F(s) = loop filter impedance in V/A
10
K
= VCO gain in rad/s/V
VCO
2Nζω
(2)(1820)(1)(5000)
(4.77e – 5)(9.06e6)
2
= ----------------------- = ----------------------------------------------------- = 42.1kΩ
K K
N = Total internal or external divisor (see 3 below)
d
VCO
It can be shown that for the loop filter shown below:
We choose R = 43kΩ for convenience.
3
K K
C
3
10
2Nζω
d
VCO
2
n
n
6. Notice R has little effect on the loop filter design. R
-----------------------
------
, R = -----------------------
C
=
, C
=
2
2
3
4
3
K K
d
VCO
should be large, around 100K, and can be adjusted to
Nω
compensate for any static phase error Tθ at lock, but if
made too large, will slow loop response. If R is made
2
Where ω = loop filter bandwidth, and ζ = loop filter damping
n
smaller, Tθ (see timing diagrams) increases, and if R
2
factor.
increases, Tθ decreases. For LDET to be low at lock, |Tθ|
< 50ns. C is used mainly to attenuate high frequency
4
1. K = 300µA/2πrad = 4.77e-5A/rad for the EL4585.
d
noise from the charge pump. The effect these
2. The loop bandwidth should be about H
SYNC
components have on time to lock is illustrated below.
frequency/20, and the damping ratio should be 1 for
optimum performance. For our example,
Lock Time
Let T = R C . As T increases, damping increases, but so
ω = 15.734kHz/20=787 Hz≈5000 rad/S.
n
3
3
3. N = 910x2 = 1820 from Table 1.
does lock time. Decreasing T decreases damping and
speeds up loop response, but increases overshoot and thus
increases the number of hunting oscillations before lock.
Critical damping (ζ=1) occurs at minimum lock time.
Because decreased damping also decreases loop stability, it
is sometimes desirable to design slightly overdamped (ζ>1),
trading lock time for increased stability.
F
28.636M
15.73426k
VCO
N = ------------------- = --------------------------- = 1820 = 910x2
F
Hsync
4. K
VCO
represents how much the VCO frequency changes
for each volt applied at the control pin. It is assumed (but
probably is not) linear about the lock point (2.5V). Its
value depends on the VCO configuration and the varactor
transfer function C = F(V ), where V is the reverse
V
C
V
C
bias control voltage, and C is varactor capacitance.
Since F(V ) is nonlinear, it is probably best to build the
C
VCO and measure K
about 2.5V. The results of one
VCO
such measurement are shown below. The slope of the
curve is determined by linear regression techniques and
equals K
VCO
. For our example, K
= 9.06 Mrad/s/V.
VCO
TYPICAL LOOP FILTER
FN7175.3
10
July 1, 2005
INTERSIL [ Intersil ]
