Microprocessor Supervisory Circuits
MAX691A/MAX693A/MAX800L/MAX800M
5
4.65V*
3
2
CHIP-ENABLE
OUTPUT
CONTROL
12
16
CE OUT
RESET
V
OUT
BATT ON
6
LOW LINE
V
CC
VBATT
CE IN
1
13
MAX691A
MAX693A
MAX800L
MAX800M
OSC IN
OSC SEL
7
8
TIMEBASE FOR
RESET AND
WATCHDOG
WATCHDOG
TRANSITION
DETECTOR
RESET
GENERATOR
15
RESET
WDI
PFI
11
9
WATCHDOG
TIMER
14
10
WDO
PFO
1.25V
4 GND
* 4.4V FOR THE MAX693A/MAX800M
Figure 4. MAX691A/MAX693A/MAX800L/MAX800M Block Diagram
5.0V
V
CC
RESET
4.0V
THRESHOLD
5.0V
0V
5V
0V
CE OUT
15μs
100μs
5V
0V
5V
0V
LOGIC LEVELS SHOWN ARE FROM 0V TO 5V.
RESET
RESET
100μs
CE IN
Figure 5. Reset and Chip-Enable Timing
10
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