IDT71T75702, IDT71T75902, 512K x 36, 1M x 18, 2.5V Synchronous ZBT™ SRAMs with
2.5V I/O, Burst Counter and Flow-Through Outputs
Commercial and Industrial Temperature Ranges
Functional Block Diagram 1M x 18
LBO
Address A [0:19]
CE
1
, CE
2
CE
2
R/W
CEN
ADV/LD
BWx
Input Register
DI
DO
D
Q
Control
D
Q
1M x 18 BIT
MEMORY ARRAY
Address
D
Clk
Q
Control Logic
Mux
Clock
Sel
OE
Gate
(optional)
TMS
TDI
TCK
TRST
Data I/O [0:15], I/O P[1:2]
JTAG
TDO
5319 drw 01a
,
Recommended DC Operating
Conditions
Symbol
V
DD
V
DDQ
V
SS
V
IH
V
IH
V
IL
Parameter
Core Supply Voltage
I/O Supply Voltage
Ground
Input High Voltage — Inputs
Input High Voltage — I/O
Input Low Voltage
Min.
2.375
2.375
0
1.7
1.7
-0.3
(1)
Typ.
2.5
2.5
0
____
____
____
Max.
2.625
2.625
0
V
DD
+0.3
V
DDQ
+0.3
(2)
0.7
Unit
V
V
V
V
V
V
5319 tbl 03
NOTE:
1. V
IL
(min.) = –0.8V for pulse width less than t
CYC
/2, once per cycle.
6.42
4
ROCHESTER [ Rochester Electronics ]
