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C8051F016 参数 Datasheet PDF下载

C8051F016图片预览
型号: C8051F016
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号32KB ISP功能的Flash MCU系列 [Mixed-Signal 32KB ISP FLASH MCU Family]
分类和应用:
文件页数/大小: 171 页 / 5235 K
品牌: SILABS [ SILICON LABORATORIES ]
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C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Figure 10.13. EIP1: Extended Interrupt Priority 1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
PCP1R
Bit7
PCP1F
Bit6
PCP0R
Bit5
PCP0F
Bit4
PPCA0
Bit3
PWADC0
Bit2
PSMB0
Bit1
PSPI0
Bit0
00000000
SFR Address:
0xF6
Bit7:
PCP1R: Comparator 1 (CP1) Rising Interrupt Priority Control.
This bit sets the priority of the CP1 interrupt.
0: CP1 rising interrupt set to low priority level.
1: CP1 rising interrupt set to high priority level.
PCP1F: Comparator 1 (CP1) Falling Interrupt Priority Control.
This bit sets the priority of the CP1 interrupt.
0: CP1 falling interrupt set to low priority level.
1: CP1 falling interrupt set to high priority level.
PCP0R: Comparator 0 (CP0) Rising Interrupt Priority Control.
This bit sets the priority of the CP0 interrupt.
0: CP0 rising interrupt set to low priority level.
1: CP0 rising interrupt set to high priority level.
PCP0F: Comparator 0 (CP0) Falling Interrupt Priority Control.
This bit sets the priority of the CP0 interrupt.
0: CP0 falling interrupt set to low priority level.
1: CP0 falling interrupt set to high priority level.
PPCA0: Programmable Counter Array (PCA0) Interrupt Priority Control.
This bit sets the priority of the PCA0 interrupt.
0: PCA0 interrupt set to low priority level.
1: PCA0 interrupt set to high priority level.
PWADC0: ADC0 Window Comparator Interrupt Priority Control.
This bit sets the priority of the ADC0 Window interrupt.
0: ADC0 Window interrupt set to low priority level.
1: ADC0 Window interrupt set to high priority level.
PSMB0: SMBus 0 Interrupt Priority Control.
This bit sets the priority of the SMBus interrupt.
0: SMBus interrupt set to low priority level.
1: SMBus interrupt set to high priority level.
PSPI0: Serial Peripheral Interface 0 Interrupt Priority Control.
This bit sets the priority of the SPI0 interrupt.
0: SPI0 interrupt set to low priority level.
1: SPI0 interrupt set to high priority level.
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
83
Rev. 1.7