C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Figure 10.14. EIP2: Extended Interrupt Priority 2
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
PXVLD
Bit7
-
Bit6
PX7
Bit5
PX6
Bit4
PX5
Bit3
PX4
Bit2
PADC0
Bit1
PT3
Bit0
00000000
SFR Address:
0xF7
Bit7:
PXVLD: External Clock Source Valid (XTLVLD) Interrupt Priority Control.
This bit sets the priority of the XTLVLD interrupt.
0: XTLVLD interrupt set to low priority level.
1: XTLVLD interrupt set to high priority level.
Reserved: Must write 0. Reads 0.
PX7: External Interrupt 7 Priority Control.
This bit sets the priority of the External Interrupt 7.
0: External Interrupt 7 set to low priority level.
1: External Interrupt 7 set to high priority level.
PX6: External Interrupt 6 Priority Control.
This bit sets the priority of the External Interrupt 6.
0: External Interrupt 6 set to low priority level.
1: External Interrupt 6 set to high priority level.
PX5: External Interrupt 5 Priority Control.
This bit sets the priority of the External Interrupt 5.
0: External Interrupt 5 set to low priority level.
1: External Interrupt 5 set to high priority level.
PX4: External Interrupt 4 Priority Control.
This bit sets the priority of the External Interrupt 4.
0: External Interrupt 4 set to low priority level.
1: External Interrupt 4 set to high priority level.
PADC0: ADC End of Conversion Interrupt Priority Control.
This bit sets the priority of the ADC0 End of Conversion Interrupt.
0: ADC0 End of Conversion interrupt set to low priority level.
1: ADC0 End of Conversion interrupt set to high priority level.
PT3: Timer 3 Interrupt Priority Control.
This bit sets the priority of the Timer 3 interrupts.
0: Timer 3 interrupt set to low priority level.
1: Timer 3 interrupt set to high priority level.
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
Rev. 1.7
84
SILABS [ SILICON LABORATORIES ]
