CY28405-3
Byte 6: Control Register
(continued)
Bit
2
0
@Pup
Name
PCIF
PCI
3V66
SRCT,SRCC
CPUT_ITP,CPUC_ITP
REF_1
REF_0
Description
Spread Spectrum Enable
0 = Spread Off, 1 = Spread On
1
0
1
1
REF_1 Output Enable
0 = Disabled, 1 = Enabled
REF_0 Output Enable
0 = Disabled, 1 = Enabled
Byte 7: Control Register
Bit
7
6
5
4
3
2
1
0
0
1
0
0
1
0
0
0
@Pup
Name
Revision ID Bit 3
Revision ID Bit 2
Revision ID Bit 1
Revision ID Bit 0
Vendor ID Bit 3
Vendor ID Bit 2
Vendor ID Bit 1
Vendor ID Bit 0
Description
Revision ID Bit 3
Revision ID Bit 2
Revision ID Bit 1
Revision ID Bit 0
Vendor ID Bit 3
Vendor ID Bit 2
Vendor ID Bit 1
Vendor ID Bit 0
Crystal Recommendations
The CY28405-3 requires a
Parallel Resonance Crystal.
Substituting a series resonance crystal will cause the
CY28405-3 to operate at the wrong frequency and violate the
ppm specification. For most applications there is a 300-ppm
frequency shift between series and parallel crystals due to
incorrect loading.
Table 6. Crystal Recommendations
Frequency
(Fund)
14.31818 MHz
Cut
AT
Loading Load Cap
Parallel
20 pF
Drive
(max.)
0.1 mW
Shunt Cap
(max.)
5 pF
Motional
(max.)
0.016 pF
Tolerance
(max.)
50 ppm
Stability
(max.)
50 ppm
Aging
(max.)
5 ppm
Crystal Loading
Crystal loading plays a critical role in achieving low ppm perfor-
mance. To realize low ppm performance, the total capacitance
the crystal will see must be considered to calculate the appro-
priate capacitive loading (CL).
The following diagram shows a typical crystal configuration
using the two trim capacitors. An important clarification for the
following discussion is that the trim capacitors are in series
with the crystal not parallel. It’s a common misconception that
load capacitors are in parallel with the crystal and should be
approximately equal to the load capacitance of the crystal.
This is
not true.
Figure 1. Crystal Capacitive Clarification
Rev 1.0, November 22, 2006
Page 7 of 16
SPECTRALINEAR [ SPECTRALINEAR INC ]
