CY28410-2
Byte 6: Control Register 6
(continued)
Bit
3
@Pup
1
Name
PCIF, SRC, PCI
Description
SW PCI_STP# Function
0=SW PCI_STP assert, 1 = SW PCI_STP deassert
When this bit is set to 0, all STOPPABLE PCI, PCIF and SRC outputs will
be stopped in a synchronous manner with no short pulses.
When this bit is set to 1, all STOPPED PCI, PCIF and SRC outputs will
resume in a synchronous manner with no short pulses.
FS_C. Reflects the value of the FS_C pin sampled on power-up
0 = FS_C was low during VTT_PWRGD# assertion
FS_B. Reflects the value of the FS_B pin sampled on power-up
0 = FS_B was low during VTT_PWRGD# assertion
FS_A. Reflects the value of the FS_A pin sampled on power-up
0 = FS_A was low during VTT_PWRGD# assertion
2
1
0
Externally
selected
Externally
selected
Externally
selected
CPUT/C
CPUT/C
CPUT/C
Byte 7: Vendor ID
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
1
0
1
0
0
0
Name
Revision Code Bit 3
Revision Code Bit 2
Revision Code Bit 1
Revision Code Bit 0
Vendor ID Bit 3
Vendor ID Bit 2
Vendor ID Bit 1
Vendor ID Bit 0
Revision Code Bit 3
Revision Code Bit 2
Revision Code Bit 1
Revision Code Bit 0
Vendor ID Bit 3
Vendor ID Bit 2
Vendor ID Bit 1
Vendor ID Bit 0
Figure 1
shows a typical crystal configuration using the two
trim capacitors. An important clarification for the following
discussion is that the trim capacitors are in series with the
crystal not parallel. It’s a common misconception that load
capacitors are in parallel with the crystal and should be
approximately equal to the load capacitance of the crystal.
This is not true.
Description
Crystal Recommendations
The CY28410-2 requires a Parallel Resonance Crystal.
Substituting a series resonance crystal will cause the
CY28410-2 to operate at the wrong frequency and violate the
ppm specification. For most applications there is a 300-ppm
frequency shift between series and parallel crystals due to
incorrect loading.
Crystal Loading
Crystal loading plays a critical role in achieving low ppm perfor-
mance. To realize low ppm performance, the total capacitance
the crystal will see must be considered to calculate the appro-
priate capacitive loading (CL).
Figure 1. Crystal Capacitive Clarification
Table 5. Crystal Recommendations
Frequency
(Fund)
14.31818 MHz
Cut
AT
Loading Load Cap
Parallel
20 pF
Drive
(max.)
0.1 mW
Shunt Cap
(max.)
5 pF
Motional
(max.)
0.016 pF
Tolerance
(max.)
35 ppm
Stability
(max.)
30 ppm
Aging
(max.)
5 ppm
Rev 1.0, November 20, 2006
Page 7 of 16
SPECTRALINEAR [ SPECTRALINEAR INC ]
