W164
PCI Clock Outputs, PCI1:6 and PCI_F (Lump Capacitance Test Load = 30 pF
CPU = 66.8/100 MHz
Parameter
Description
Period
Test Condition/Comments
Measured on rising edge at 1.±V
Min.
30
12
12
1
Typ.
Max.
Unit
ns
tP
tH
tL
High Time
Duration of clock cycle above 2.4V
Duration of clock cycle below 0.4V
Measured from 0.4V to 2.4V
ns
Low Time
ns
tR
tF
Output Rise Edge Rate
Output Fall Edge Rate
Duty Cycle
4
4
V/ns
V/ns
5
Measured from 2.4V to 0.4V
1
tD
tJC
Measured on rising and falling edge at 1.±V
4±
±±
2±0
Jitter, Cycle-to-Cycle
Measured on rising edge at 1.±V. Maximum
difference of cycle time between two adjacent cycles.
ps
tSK
tO
Output Skew
Measured on rising edge at 1.±V
±00
4
ps
ns
CPU to PCI Clock Skew Covers all CPU/PCI outputs. Measured on rising
edge at 1.±V. CPU leads PCI output.
1
fST
Frequency Stabilization
from Power-up (cold
start)
Assumes full supply voltage reached within 1 ms
from power-up. Short cycles exist prior to frequency
stabilization.
3
ms
Zo
AC Output Impedance
Average value during switching transition. Used for
determining series termination value.
20
:
IOAPIC Clock Output (Lump Capacitance Test Load = 20 pF)
CPU = 66.8/100 MHz
Parameter
Description
Frequency, Actual
Output Rise Edge Rate
Output Fall Edge Rate
Duty Cycle
Test Condition/Comments
Frequency generated by crystal oscillator
Measured from 0.4V to 2.0V
Min.
Typ.
Max.
Unit
MHz
V/ns
V/ns
5
f
14.31818
tR
tF
tD
fST
1
1
4
4
Measured from 2.0V to 0.4V
Measured on rising and falling edge at 1.2±V
4±
±±
1.±
Frequency Stabilization
Assumes full supply voltage reached within
ms
from Power-up (cold start) 1 ms from power-up. Short cycles exist prior to
frequency stabilization.
Zo
AC Output Impedance
Averagevalueduringswitchingtransition.Used
for determining series termination value.
1±
:
REF2X Clock Output (Lump Capacitance Test Load = 20 pF)
CPU = 66.8/100 MHz
Parameter
Description
Frequency, Actual
Output Rise Edge Rate
Output Fall Edge Rate
Duty Cycle
Test Condition/Comments
Frequency generated by crystal oscillator
Measured from 0.4V to 2.4V
Min.
Typ.
Max. Unit
f
14.318
MHz
tR
0.±
0.±
4±
2
2
V/ns
V/ns
5
tF
Measured from 2.4V to 0.4V
tD
Measured on rising and falling edge at 1.±V
±±
3
fST
FrequencyStabilizationfrom Assumes full supply voltage reached within
1 ms from power-up. Short cycles exist prior to
frequency stabilization.
ms
Power-up (cold start)
Zo
AC Output Impedance
Average value during switching transition. Used
for determining series termination value.
1±
:
Rev 1.0,November 28, 2006
Page 10 of 11
SPECTRALINEAR [ SPECTRALINEAR INC ]
