Electrical characteristics
Table 43.
Symbol
LU
STM32F103xC, STM32F103xD, STM32F103xE
Electrical sensitivities
Parameter
Static latch-up class
Conditions
T
A
=
+105 °C conforming to JESD78A
Class
II level A
5.3.13
I/O port characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in
are derived from tests
performed under the conditions summarized in
All I/Os are CMOS and TTL
compliant.
Table 44.
Symbol
V
IL
I/O static characteristics
Parameter
Input low level voltage
(1)
Standard IO input high level
voltage
(1)
TTL ports
Conditions
Min
–0.5
2
2
–0.5
CMOS ports
0.65 V
DD
200
5% V
DD(4)
V
SS
≤
V
IN
≤
V
DD
Standard I/Os
V
IN
= 5 V
I/O FT
Weak pull-up equivalent
resistor
(6)
Weak pull-down equivalent
resistor
I/O pin capacitance
V
IN
=
V
SS
V
IN
=
V
DD
30
30
40
40
5
±1
µA
3
50
50
kΩ
kΩ
pF
Typ
Max
0.8
V
V
DD
+0.5
5.5V
0.35 V
DD
V
DD
+0.5
mV
mV
Unit
V
IH
IO FT
(2)
input high level
voltage
(1)
Input low level voltage
(1)
Input high level voltage
(1)
Standard IO Schmitt trigger
voltage hysteresis
(3)
V
IL
V
IH
V
V
hys
IO FT Schmitt trigger voltage
hysteresis
(3)
I
lkg
Input leakage current
(5)
R
PU
R
PD
C
IO
1. Values based on characterization results, and not tested in production.
2. FT = Five-volt tolerant.
3. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
4. With a minimum of 100 mV.
5. Leakage could be higher than max. if negative current is injected on adjacent pins.
6. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable
PMOS/NMOS. This MOS/NMOS contribution
to the series resistance is minimum
(~10% order)
.
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