ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to ob-
serve proper handling and installation procedures can
cause damage.
ESD damage can range from subtle performance deg-
radation to complete device failure. Precision integrated
circuits may be more susceptible to damage because
very small parametric changes could cause the device
not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS
(1)
Power Supply Voltage ...................................................................... +6.5V
+V
CC
to +V
DD
Difference ...................................................................
±0.1V
Input Logic Voltage .................................................. –0.3V to (V
DD
+ 0.3V)
Input Current (except power supply) ...............................................
±10mA
Power Dissipation .......................................................................... 300mW
Operating Temperature Range ......................................... –25°C to +85°C
Storage Temperature ...................................................... –55°C to +125°C
Lead Temperature (soldering, 5s) .................................................. +260°C
Thermal Resistance,
θ
JA .......................................................................................
+70°C/W
NOTE: (1) Stresses above those listed under Absolute Maximum Ratings may
cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
PIN CONFIGURATION
TOP VIEW
SSOP
XT1
PGND
V
CP
MCKO
RSV
SCKO3
ML
MC
MD
1
2
3
4
5
6
7
8
9
24
23
22
21
20
19
18
17
16
15
14
13
XT2
DGND
V
DD
SCKO1
SCKO2
LRCIN
DIN
BCKIN
ZERO
CAP
V
OUT
L
V
CA
RSTB 10
V
OUT
R 11
AGND 12
PIN ASSIGNMENTS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NAME
XT1
PGND
V
CP
MCKO
RSV
SCKO3
ML
MC
MD
RSTB
V
OUT
R
AGND
V
CA
V
OUT
L
CAP
ZERO
I/O
IN
—
—
OUT
—
OUT
IN
IN
IN
IN
OUT
—
—
OUT
—
OUT
DESCRIPTION
27MHz Crystal or External Clock Input
PLL Ground
PLL Power Supply (+5V)
Buffered Clock Output of Crystal Oscillator
Reserve; This pin should be open.
System Clock Out 3; This output is 768f
S
or 384f
S
.
Latch Enable Input for Serial Interface Mode
(2)
Bit Clock Input for Serial Interface Mode
(2)
Serial Data Input for Serial Interface Mode
(2)
Reset; When this pin is low, the DF and modu-
lator are held in reset.
Right Channel, Analog Voltage Output of Audio
Signal
Analog Ground
Analog Power Supply (+5V)
Left Channel, Analog Voltage Output of Audio
Signal
Common Pin of Analog Output Amp
Zero Data Flag; This pin is low when the input
data is continuously zero for more than 65,535
cycles of BCKIN
(1)
.
Bit Clock Input for Serial Audio Data
(3)
Serial Audio Data Input
(3)
Left and Right Clock (sampling rate–f
S
)
(3)
System Clock Out 2; This output is 256f
S
or
384f
S
system clock.
System Clock Out 1; This output is 33.8688MHz
system clock.
Digital Power (+5V)
Digital Ground
27MHz Crystal. Connected to GND at external
clock.
PACKAGE INFORMATION
(1)
PRODUCT
PCM1727E
PACKAGE
24-Pin SSOP
PACKAGE
DESIGNATOR
DB
NOTE: (1) For the most current package and ordering information, see the
Package Option Addendum at the end of this data sheet, or see the TI website
at www.ti.com.
17
18
19
20
21
22
23
24
BCKIN
DIN
LRCIN
SCKO2
SCKO1
V
DD
DGND
XT2
IN
IN
IN
OUT
OUT
—
—
—
NOTES: (1) Open Drain Output.
(2) Schmitt trigger input with internal pull-up resistors.
(3) Schmitt trigger input.
2
PCM1727
www.ti.com
SBAS077A
TI [ TEXAS INSTRUMENTS ]
