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SCPS216A – JULY 2009 – REVISED FEBRAURY 2010
8.36 Asynchronous Request Filter Low Register
The asynchronous request filter low set/clear register enables asynchronous receive requests on a
per-node basis, and handles the lower node IDs. Other than filtering different node IDs, this register
behaves identically to the asynchronous request filter high register. See
for a complete
description of the register contents.
OHCI register offset:
Register type:
Default value:
BIT NUMBER
RESET STATE
BIT NUMBER
RESET STATE
31
0
15
0
30
0
14
0
29
0
13
0
28
0
12
0
108h set register
10Ch clear register
Read/Set/Clear
0000 0000h
27
0
11
0
26
0
10
0
25
0
9
0
24
0
8
0
23
0
7
0
22
0
6
0
21
0
5
0
20
0
4
0
19
0
3
0
18
0
2
0
17
0
1
0
16
0
0
0
Table 8-28. Asynchronous Request Filter Low Register Description
BIT
31
30
29-2
1
0
FIELD NAME
asynReqResource31
asynReqResource30
asynReqResourcen
asynReqResource1
asynReqResource0
TYPE
RSC
RSC
RSC
RSC
RSC
DESCRIPTION
If bit 31 is set to 1b for local bus node number 31, asynchronous requests received by the
controller from that node are accepted.
If bit 30 is set to 1b for local bus node number 30, asynchronous requests received by the
controller from that node are accepted.
Bits 29 through 2 (asynReqResourcen, where n = 29, 28, 27, ..., 2) follow the same pattern
as bits 31 and 30.
If bit 1 is set to 1b for local bus node number 1, asynchronous requests received by the
controller from that node are accepted.
If bit 0 is set to 1b for local bus node number 0, asynchronous requests received by the
controller from that node are accepted.
8.37 Physical Request Filter High Register
The physical request filter high set/clear register enables physical receive requests on a per-node basis,
and handles the upper node IDs. When a packet is destined for the physical request context and the node
ID has been compared against the ARRQ registers, the comparison is done again with this register. If the
bit corresponding to the node ID is not set to 1b in this register, the request is handled by the ARRQ
context instead of the physical request context. The node ID comparison is done if the source node is on
the same bus as the controller. Nonlocal bus-sourced packets are not acknowledged unless bit 31 in this
register is set to 1b. See
for a complete description of the register contents.
OHCI register offset:
Register type:
Default value:
BIT NUMBER
RESET STATE
BIT NUMBER
RESET STATE
31
0
15
0
30
0
14
0
29
0
13
0
28
0
12
0
27
0
11
0
110h set register
114h clear register
Read/Set/Clear
0000 0000h
26
0
10
0
25
0
9
0
24
0
8
0
23
0
7
0
22
0
6
0
21
0
5
0
20
0
4
0
19
0
3
0
18
0
2
0
17
0
1
0
16
0
0
0
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1394 OHCI Memory-Mapped Register Space
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