Spartan-3 FPGA Family: Functional Description
R
Revision History
Date
04/11/03
05/19/03
07/11/03
Version No.
1.0
1.1
1.2
Initial Xilinx release
Added Block RAM column, DCMs, and multipliers to XC3S50 descriptions.
Explained the configuration port
Persist
option in
section.
Updated
and
section to indicate that DDR clocking
for the XC3S50 is the same as that for all other Spartan-3 devices. Updated description of I/O
voltage tolerance in
section. In
changed input termination type for
DCI version of the LVCMOS standard to
None.
Added additional flexibility for making DLL
connections in
and accompanying text. In the
section, inserted an
explanation of how to choose power supplies for the configuration interface, including
guidelines for achieving 3.3V-tolerance.
Showed inversion of 3-state signal (Figure
Clarified description of pull-up and pull-down
resistors (Table
5
and
Added information on operating block RAM with multipliers to
Corrected output buffer name in
Corrected description of how DOUT is
synchronized to CCLK (page
Corrected description of WRITE_FIRST and READ_FIRST in
Added note regarding
address setup and hold time requirements whenever a block RAM port is enabled (Table
Added information in the maximum length of a
daisy-chain. Added reference
to
in
section. Added information on the
STATUS[2] DCM output (Table
Added information on CCLK behavior and termination
recommendations to
Added
section.
Added
section. Removed GSR from
because its
timing is not programmable.
Updated
Updated
Updated
Updated
Corrected
Platform Flash supply voltage name and value in
and
Added
Corrected a few minor typographical errors.
Added more information on the pull-up resistors that are active during configuration to
Added information to
about potential
interactions when configuring via JTAG if the mode select pins are set for other than JTAG.
Added
Noted SSTL2_I_DCI
25-Ohm driver in
and
Added note that pull-down is active during boundary
scan tests.
Updated links to documentation on xilinx.com.
Added HSLVDCI to
Updated formatting and links.
Description
08/24/04
1.3
08/19/05
1.4
04/03/06
2.0
04/26/06
2.1
05/25/07
2.2
11/30/07
06/25/08
2.3
2.4
54
DS099-2 (v2.4) June 25, 2008
Product Specification
XILINX [ XILINX, INC ]
