AD811AN现货热卖使用介绍供应商报价哪里找芯片批发报价-中国IC网-芯三七

High Performance

Video Op Amp

a

AD811

CONNECTION DIAGRAMS

FEATURES

High Speed

20-Lead LCC (E-20A) Package

8-Lead Plastic (N-8)

Cerdip (Q-8)

SOIC (SO-8) Packages

140 MHz Bandwidth (3 dB, G = +1)

120 MHz Bandwidth (3 dB, G = +2)

35 MHz Bandwidth (0.1 dB, G = +2)

2500 V/␮s Slew Rate

25 ns Settling Time to 0.1% (For a 2 V Step)

65 ns Settling Time to 0.01% (For a 10 V Step)

Excellent Video Performance (R_L=150 ⍀)

0.01% Differential Gain, 0.01؇ Differential Phase

Voltage Noise of 1.9 nV√Hz

20

1

2

19

3

NC 4

18 NC

17

NC

–IN

+IN

NC

+V

1

2

3

4

8

7

6

5

6

7

NC

–IN

NC

16 +V

AD811

S

15 NC

OUTPUT

NC

+IN 8

14 OUTPUT

–V

S

AD811

9

10 1112 13

NC = NO CONNECT

Low Distortion: THD = –74 dB @ 10 MHz

Excellent DC Precision

3 mV max Input Offset Voltage

Flexible Operation

Specified for ؎5 V and ؎15 V Operation

؎2.3 V Output Swing into a 75 ⍀ Load (V_S= ؎5 V)

16-Lead SOIC (R-16) Package 20-Lead SOIC (R-20) Package

NC

–IN

NC

+IN

NC

1

2

3

4

5

6

7

8

20

19

18

NC

+V

1

2

3

4

16 NC

15 NC

NC

+V

14

–IN

NC

S

APPLICATIONS

Video Crosspoint Switchers, Multimedia Broadcast

Systems

HDTV Compatible Systems

Video Line Drivers, Distribution Amplifiers

ADC/DAC Buffers

DC Restoration Circuits

Medical—Ultrasound, PET, Gamma and Counter

Applications

17

16

13 NC

12

S

NC

+IN

NC

5

6

7

8

OUTPUT

15 OUTPUT

14 NC

11 NC

10

9

–V

S

NC

AD811

–V

S

NC

13

12

11

NC

9

NC = NO CONNECT

AD811

10

NC

NC = NO CONNECT

PRODUCT DESCRIPTION

The AD811 is also excellent for pulsed applications where tran-

sient response is critical. It can achieve a maximum slew rate of

greater than 2500 V/µs with a settling time of less than 25 ns to

0.1% on a 2 volt step and 65 ns to 0.01% on a 10 volt step.

The AD811 is a wideband current-feedback operational ampli-

fier, optimized for broadcast quality video systems. The –3 dB

bandwidth of 120 MHz at a gain of +2 and differential gain and

phase of 0.01% and 0.01° (R_L= 150 Ω) make the AD811 an

excellent choice for all video systems. The AD811 is designed to

meet a stringent 0.1 dB gain flatness specification to a band-

width of 35 MHz (G = +2) in addition to the low differential

gain and phase errors. This performance is achieved whether

driving one or two back terminated 75 Ω cables, with a low

power supply current of 16.5 mA. Furthermore, the AD811 is

specified over a power supply range of ±4.5 V to ±18 V.

The AD811 is ideal as an ADC or DAC buffer in data acquisi-

tion systems due to its low distortion up to 10 MHz and its wide

unity gain bandwidth. Because the AD811 is a current feedback

amplifier, this bandwidth can be maintained over a wide range

of gains. The AD811 also offers low voltage and current noise of

1.9 nV/√Hz and 20 pA/√Hz, respectively, and excellent dc accu-

racy for wide dynamic range applications.

12

0.20

0.10

G = +2

0.18

0.09

R_F= 649⍀

R_L= 150⍀

9

6

3

V_S= ؎15V

F_C= 3.58MHz

100 IRE

R_G= R_FB

0.16

0.14

0.12

0.10

0.08

0.06

0.04

0.02

0.08

0.07

MODULATED RAMP

R_L= 150⍀

0.06

0.05

0.04

0.03

0.02

0.01

V_S= ؎5V

PHASE

0

–3

–6

GAIN

6

1M

10M

FREQUENCY – Hz

100M

5

7

8

9

10 11 12 13 14 15

SUPPLY VOLTAGE – Volts

؎

REV. D

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, nor for any infringements of patents or other rights of third parties

which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

Fax: 781/326-8703

World Wide Web Site: http://www.analog.com

(@ T_A= +25؇C and V_S= ؎15 V dc, R_LOAD= 150 Ω unless otherwise noted)

AD811–SPECIFICATIONS

AD811J/A¹

Typ

AD811S²

Typ

Model

Conditions

V_S

Min

Max

Min

Max

Units

DYNAMIC PERFORMANCE

Small Signal Bandwidth (No Peaking)

–3 dB

G = +1

G = +2

G = +10

0.1 dB Flat

G = +2

R_FB= 562 Ω

R_FB= 649 Ω

R_FB= 562 Ω

R_FB= 511 Ω

±15 V

±5 V

140

120

80

140

120

80

MHz

±15 V

100

R_FB= 562 Ω

R_FB= 649 Ω

V_OUT= 20 V p-p

V_OUT= 4 V p-p

V_OUT= 20 V p-p

10 V Step, A_V= –1

±5 V

25

35

40

400

2500

50

65

25

3.5

0.01

–74

36

25

35

40

400

2500

50

65

25

3.5

0.01

–74

36

MHz

V/µs

ns

%

Degree

dBc

dBm

±15 V

±5 V

±15 V

Full Power Bandwidth³

Slew Rate

Settling Time to 0.1%

Settling Time to 0.01%

Settling Time to 0.1%

Rise Time, Fall Time

Differential Gain

2 V Step, A_V= –1

R_FB= 649, A_V= +2

f = 3.58 MHz

V_OUT= 2 V p-p, A_V= +2

@ f_C= 10 MHz

±5 V

±15 V

±5 V

Differential Phase

THD @ f_C= 10 MHz

Third Order Intercept⁴

±15 V

43

INPUT OFFSET VOLTAGE

Offset Voltage Drift

±5 V, ±15 V

0.5

3

5

0.5

3

5

mV

µV/°C

T_MINto T_MAX

5

INPUT BIAS CURRENT

–Input

±5 V, ±15 V

2

5

2

5

µA

T_MINto T_MAX

15

10

20

30

10

25

+Input

TRANSRESISTANCE

T_MINto T_MAX

V_OUT= ±10 V

R_L= ∞

±15 V

0.75

0.5

1.5

0.75

0.5

1.5

0.75

MΩ

R_L= 200 Ω

V_OUT= ±2.5 V

R_L= 150 Ω

±5 V

0.25

0.4

0.125 0.4

MΩ

COMMON-MODE REJECTION

V_OS(vs. Common Mode)

T_MINto T_MAX

Input Current (vs. Common Mode)

V_CM= ±2.5

V_CM= ±10 V

T_MINto T_MAX

±5 V

±15 V

56

60

66

1

50

56

60

66

1

dB

µA/V

3

POWER SUPPLY REJECTION

V_OS

+Input Current

–Input Current

V_S= ±4.5 V to ±18 V

T_MINto T_MAX

60

70

0.3

0.4

60

70

0.3

0.4

dB

µA/V

2

T_MINto T_MAX

INPUT VOLTAGE NOISE

INPUT CURRENT NOISE

f = 1 kHz

1.9

20

1.9

20

nV/√Hz

pA/√Hz

OUTPUT CHARACTERISTICS

Voltage Swing, Useful Operating Range⁵

±5 V

±15 V

±2.9

±12

100

150

9

±2.9

±12

100

150

9

V

mA

Ω

Output Current

Short-Circuit Current

Output Resistance

T_J= +25°C

(Open Loop @ 5 MHz)

INPUT CHARACTERISTICS

+Input Resistance

–Input Resistance

1.5

14

1.5

14

MΩ

Ω

Input Capacitance

Common-Mode Voltage Range

+Input

7.5

±3

7.5

±3

pF

V

±5 V

±15 V

±13

V

POWER SUPPLY

Operating Range

Quiescent Current

±4.5

±18

16.0

18.0

±4.5

±18

16.0

18.0

V

mA

±5 V

±15 V

14.5

16.5

14.5

16.5

TRANSISTOR COUNT

NOTES

# of Transistors

40

¹The AD811JR is specified with ± 5 V power supplies only, with operation up to ±12 volts.

²See Analog Devices’ military data sheet for 883B tested specifications.

³FPBW = slew rate/(2 π V_PEAK).

⁴Output power level, tested at a closed loop gain of two.

⁵Useful operating range is defined as the output voltage at which linearity begins to degrade.

Specifications subject to change without notice.

REV. D

–2–

AD811

ABSOLUTE MAXIMUM RATINGS¹

MAXIMUM POWER DISSIPATION

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±18 V

AD811JR Grade Only . . . . . . . . . . . . . . . . . . . . . . . . .±12 V

Internal Power Dissipation². . . . . . . . Observe Derating Curves

Output Short Circuit Duration . . . . . Observe Derating Curves

Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . ±V_S

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . .±6 V

Storage Temperature Range (Q, E) . . . . . . . . –65°C to +150°C

Storage Temperature Range (N, R) . . . . . . . . –65°C to +125°C

Operating Temperature Range

AD811J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0°C to +70°C

AD811A . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C

AD811S . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C

Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300°C

The maximum power that can be safely dissipated by the

AD811 is limited by the associated rise in junction temperature.

For the plastic packages, the maximum safe junction tempera-

ture is +145°C. For the cerdip and LCC packages, the maxi-

mum junction temperature is +175°C. If these maximums are

exceeded momentarily, proper circuit operation will be restored

as soon as the die temperature is reduced. Leaving the device in

the “overheated” condition for an extended period can result in

device burnout. To ensure proper operation, it is important to

observe the derating curves in Figures 17 and 18.

While the AD811 is internally short circuit protected, this may

not be sufficient to guarantee that the maximum junction tem-

perature is not exceeded under all conditions. One important

example is when the amplifier is driving a reverse terminated

75 Ω cable and the cable’s far end is shorted to a power supply.

With power supplies of ±12 volts (or less) at an ambient tem-

perature of +25°C or less, if the cable is shorted to a supply rail,

then the amplifier will not be destroyed, even if this condition

persists for an extended period.

NOTES

¹Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the

device at these or any other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect device reliability.

²8-Lead Plastic Package: θ_JA= 90°C/W

8-Lead Cerdip Package: θ_JA= 110°C/W

8-Lead SOIC Package: θ_JA= 155°C/W

16-Lead SOIC Package: θ_JA= 85°C/W

ESD SUSCEPTIBILITY

20-Lead SOIC Package: θ_JA= 80°C/W

20-Lead LCC Package: θ_JA= 70°C/W

ESD (electrostatic discharge) sensitive device. Electrostatic

charges as high as 4000 volts, which readily accumulate on the

human body and on test equipment, can discharge without

detection. Although the AD811 features proprietary ESD pro-

tection circuitry, permanent damage may still occur on these

devices if they are subjected to high energy electrostatic dis-

charges. Therefore, proper ESD precautions are recommended

to avoid any performance degradation or loss of functionality.

ORDERING GUIDE

Temperature

Range

Package

Option*

Model

AD811AN

AD811AR-16

AD811AR-20

AD811JR

–40°C to +85°C

0°C to +70°C

N-8

R-16

R-20

SO-8

Q-8

METALIZATION PHOTOGRAPH

Contact Factory for Latest Dimensions.

Dimensions Shown in Inches and (mm).

AD811SQ/883B

5962-9313101MPA

AD811SE/883B

5962-9313101M2A

AD811JR-REEL

AD811JR-REEL7

AD811AR-16-REEL

AD811AR-16-REEL7

AD811AR-20-REEL

AD811ACHIPS

AD811SCHIPS

–55°C to +125°C

0°C to +70°C

Q-8

E-20A

SO-8

R-16

R-20

Die

0°C to +70°C

–40°C to +85°C

–55°C to +125°C

Die

*E = Ceramic Leadless Chip Carrier; N = Plastic DIP; Q = Cerdip; SO (R) =

Small Outline IC (SOIC).

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the AD811 features proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

REV. D

–3–

AD811–Typical Performance Characteristics

20

15

10

T

= +25؇C

A

T

= +25؇C

A

15

10

NO LOAD

R

= 150⍀

L

5

0

5

0

5

10

SUPPLY VOLTAGE – ؎Volts

15

20

0

5

10

SUPPLY VOLTAGE – ؎ Volts

15

20

Figure 1. Input Common-Mode Voltage Range vs. Supply

Figure 4. Output Voltage Swing vs. Supply

35

30

21

18

V

= ؎15V

S

25

20

15

V

= ؎15V

15

S

12

9

V

= ؎5V

S

V

= ؎5V

S

10

5

6

0

3

10

100

1k

10k

–60 –40 –20

0

20

60

120 140

40

80

100

LOAD RESISTANCE – ⍀

JUNCTION TEMPERATURE – ؇C

Figure 2. Output Voltage Swing vs. Resistive Load

Figure 5. Quiescent Supply Current vs. Junction

Temperature

10

8

NONINVERTING INPUT

؎5 TO ؎15V

6

4

V

= ؎5V

S

0

V

= ؎5V

S

INVERTING

INPUT

2

–10

–20

–30

0

–2

–4

–6

V

= ؎15V

S

V

= ؎15V

S

–8

–10

–60 –40 –20

0

20

40

60

80

100 120 140

–60 –40 –20

0

20

40

60

80

100 120 140

JUNCTION TEMPERATURE – ؇C

Figure 3. Input Bias Current vs. Junction Temperature

Figure 6. Input Offset Voltage vs. Junction Temperature

–4–

REV. D

AD811

2.0

1.5

1.0

250

200

150

V

= ؎15V

= 200⍀

S

R

V

L

= ؎10V

OUT

V

= ؎15V

S

0.5

0

V

= ؎5V

V

= ؎5V

100

50

S

R

V

= 150⍀

L

= ؎2.5V

OUT

–60 –40 –20

0

20

40

60

80

100 120 140

–60

–40 –20

0

20

40

60

80

100 120 140

JUNCTION TEMPERATURE – ؇C

Figure 10. Transresistance vs. Junction Temperature

Figure 7. Short Circuit Current vs. Junction Temperature

100

10

1

10

100

10

1

NONINVERTING CURRENT V = ؎5 TO 15V

S

V

= ؎5V

S

1

INVERTING CURRENT V = ؎5 TO 15V

S

0.1

V

= ؎15V

S

VOLTAGE NOISE V = ؎15V

S

GAIN = +2

= 649⍀

R

FB

VOLTAGE NOISE V = ؎5V

S

0.01

10k

100k

1M

10M

100M

100

1k

10k

100k

10

FREQUENCY – Hz

Figure 11. Input Noise vs. Frequency

Figure 8. Closed-Loop Output Resistance vs. Frequency

200

10

8

10

V

= 1V p–p

RISE TIME

O

V = ؎15V

160

120

80

40

0

S

8

6

4

2

60

40

20

0

R = 150⍀

L

GAIN = +2

6

BANDWIDTH

V

= ؎15V

= 1V p–p

= 150⍀

S

OVERSHOOT

O

4

R

L

GAIN = +2

2

0

PEAKING

800

0

400

600

1.0k

1.2k

1.4k

1.6k

600

1.0k

1.2k

1.4k

1.6k

800

VALUE OF FEEDBACK RESISTOR (R ) – ⍀

FB

VALUE OF FEEDBACK RESISTOR (R ) – ⍀

FB

Figure 12. 3 dB Bandwidth and Peaking vs. Value of R_FB

Figure 9. Rise Time and Overshoot vs. Value of

Feedback Resistor, R_FB

REV. D

–5–

AD811

110

100

90

25

20

15

10

649⍀

150⍀

V

OUT

IN

V

= ؎15V

S

150⍀

80

GAIN = +10

OUTPUT LEVEL FOR 3% THD

70

V

= ؎15V

S

60

V

= ؎5V

S

50

V

= ؎5V

S

5

0

40

30

1k

10k

100k

FREQUENCY – Hz

1M

10M

100k

1M

10M

100M

FREQUENCY – Hz

Figure 13. Common-Mode Rejection vs. Frequency

Figure 16. Large Signal Frequency Response

80

–50

V

= 2V p–p

OUT

V

= ؎15V

= ؎5V

R

A

= 649⍀

S

70

60

50

40

30

20

10

5

F

R

= 100⍀

L

= +2

V

GAIN = +2

–70

–90

؎5V SUPPLIES

V

S

CURVES ARE FOR WORST

CASE CONDITION WHERE

ONE SUPPLY IS VARIED

WHILE THE OTHER IS

HELD CONSTANT.

2ND HARMONIC

3RD HARMONIC

؎15V SUPPLIES

–110

–130

2ND HARMONIC

3RD HARMONIC

1k

10k

100k

1M

10M

1k

10k

100k

1M

10M

FREQUENCY – Hz

Figure 14. Power Supply Rejection vs. Frequency

Figure 17. Harmonic Distortion vs. Frequency

2.5

3.4

3.2

T

MAX = +145؇C

J

3.0

2.8

2.6

2.4

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

T

MAX = +175؇C

J

16-LEAD SOIC

2.0

1.5

1.0

0.5

20-LEAD LCC

20-LEAD SOIC

8-LEAD MINI-DIP

8-LEAD CERDIP

8-LEAD SOIC

0.6

0.4

–50 –40 –30 –20 –10

0

10 20 30 40 50 60 70 80 90

–60 –40 –20

0

20

40

60

80

100 120 140

AMBIENT TEMPERATURE – ؇C

Figure 15. Maximum Power Dissipation vs. Temperature

for Plastic Packages

Figure 18. Maximum Power Dissipation vs. Temperature

for Hermetic Packages

–6–

REV. D

Typical Characteristics, Noninverting Connection–AD811

9

G = +1

R

FB

R

= 150⍀

6

3

L

=

G

+V

S

V

= ؎15V

= 750⍀

S

R

V

TO

FB

OUT

0.1␮F

TEKTRONIX

P6201 FET

PROBE

R

G

0

AD811

+

V

–3

–6

–9

–12

IN

R

L

V

= ؎5V

S

HP8130

PULSE

GENERATOR

50⍀

R

= 619⍀

FB

–V

0.1␮F

S

1M

10M

FREQUENCY – Hz

100M

Figure 22. Closed-Loop Gain vs. Frequency, Gain = +1

Figure 19. Noninverting Amplifier Connection

26

1V

G = +10

10ns

V

R

= ؎15V

S

23

20

17

14

11

8

R

= 150⍀

L

= 511⍀

FB

100

90

V

IN

V

R

= ؎5V

= 442⍀

S

FB

10

V

OUT

0%

1V

1M

10M

FREQUENCY – Hz

100M

Figure 20. Small Signal Pulse Response, Gain = +1

Figure 23. Closed-Loop Gain vs. Frequency, Gain = +10

100mV

10ns

1V

20ns

100

90

100

90

V

IN

V

IN

10

V

OUT

V

OUT

0%

1V

10V

Figure 21. Small Signal Pulse Response, Gain = +10

Figure 24. Large Signal Pulse Response, Gain = +10

REV. D

–7–

AD811–Typical Characteristics, Inverting Connection

6

R

FB

V

R

= ؎15V

= 590⍀

S

G = –1

R = 150⍀

L

+V

3

0

FB

S

0.1␮F

V

TO

OUT

TEKTRONIX

P6201 FET

PROBE

R

V

G

IN

–3

–6

–9

–12

HP8130

PULSE

GENERATOR

AD811

V

R

= ؎5V

S

R

L

= 562⍀

FB

0.1␮F

1M

10M

FREQUENCY – Hz

100M

–V

S

Figure 25. Inverting Amplifier Connection

Figure 28. Closed-Loop Gain vs. Frequency, Gain = –1

26

G = –10

1V

10ns

V

R

= ؎15V

23

20

17

14

11

8

S

R

= 150⍀

L

= 511⍀

FB

100

90

V

IN

V

R

= ؎5V

= 442⍀

S

FB

10

V

OUT

0%

1V

1M

10M

FREQUENCY – Hz

100M

Figure 29. Closed-Loop Gain vs. Frequency, Gain = –10

Figure 26. Small Signal Pulse Response, Gain = –1

1V

20ns

100mV

10ns

100

90

100

90

V

IN

V

IN

10

V

OUT

V

OUT

0%

10V

1V

Figure 30. Large Signal Pulse Response, Gain = –10

Figure 27. Small Signal Pulse Response, Gain = –10

–8–

REV. D

AD811

Achieving the Flattest Gain Response at High Frequency

Achieving and maintaining gain flatness of better than 0.1 dB at

frequencies above 10 MHz requires careful consideration of

several issues.

APPLICATIONS

General Design Considerations

The AD811 is a current feedback amplifier optimized for use in

high performance video and data acquisition applications. Since

it uses a current feedback architecture, its closed-loop –3 dB

bandwidth is dependent on the magnitude of the feedback resis-

tor. The desired closed-loop gain and bandwidth are obtained

by varying the feedback resistor (R_FB) to tune the bandwidth,

and varying the gain resistor (R_G) to get the correct gain. Table I

contains recommended resistor values for a variety of useful

closed-loop gains and supply voltages.

Choice of Feedback and Gain Resistors

Because of the above-mentioned relationship between the 3 dB

bandwidth and the feedback resistor, the fine scale gain flatness

will, to some extent, vary with feedback resistor tolerance. It is,

therefore, recommended that resistors with a 1% tolerance be

used if it is desired to maintain flatness over a wide range of

production lots. In addition, resistors of different construction

have different associated parasitic capacitance and inductance.

Metal-film resistors were used for the bulk of the characteriza-

tion for this data sheet. It is possible that values other than those

indicated will be optimal for other resistor types.

Table I. –3 dB Bandwidth vs. Closed-Loop Gain and

Resistance Values

V_S= ؎15 V

Closed-Loop

Gain

Printed Circuit Board Layout Considerations

–3 dB BW

(MHz)

As to be expected for a wideband amplifier, PC board parasitics

can affect the overall closed loop performance. Of concern are

stray capacitances at the output and the inverting input nodes. If

a ground plane is to be used on the same side of the board as

the signal traces, a space (3/16" is plenty) should be left around

the signal lines to minimize coupling. Additionally, signal lines

connecting the feedback and gain resistors should be short

enough so that their associated inductance does not cause

high frequency gain errors. Line lengths less than 1/4" are

recommended.

R_FB

R_G

+1

+2

+10

–1

–10

750 Ω

649 Ω

511 Ω

590 Ω

511 Ω

140

120

100

115

95

649 Ω

56.2 Ω

590 Ω

51.1 Ω

V_S= ؎5 V

Closed-Loop

Gain

–3 dB BW

(MHz)

R_FB

R_G

Quality of Coaxial Cable

+1

+2

+10

–1

619 Ω

562 Ω

442 Ω

562 Ω

442 Ω

80

65

75

65

Optimum flatness when driving a coax cable is possible only

when the driven cable is terminated at each end with a resistor

matching its characteristic impedance. If the coax was ideal,

then the resulting flatness would not be affected by the length of

the cable. While outstanding results can be achieved using inex-

pensive cables, it should be noted that some variation in flatness

due to varying cable lengths may be experienced.

562 Ω

48.7 Ω

562 Ω

44.2 Ω

–10

V_S= ؎10 V

Closed-Loop

Gain

–3 dB BW

(MHz)

R_FB

R_G

Power Supply Bypassing

Adequate power supply bypassing can be critical when optimiz-

ing the performance of a high frequency circuit. Inductance in

the power supply leads can form resonant circuits that produce

peaking in the amplifier’s response. In addition, if large current

transients must be delivered to the load, then bypass capacitors

(typically greater than 1 µF) will be required to provide the best

settling time and lowest distortion. Although the recommended

0.1 µF power supply bypass capacitors will be sufficient in many

applications, more elaborate bypassing (such as using two paral-

leled capacitors) may be required in some cases.

+1

+2

+10

–1

–10

649 Ω

590 Ω

499 Ω

590 Ω

499 Ω

105

80

105

80

590 Ω

49.9 Ω

590 Ω

49.9 Ω

Figures 11 and 12 illustrate the relationship between the feed-

back resistor and the frequency and time domain response char-

acteristics for a closed-loop gain of +2. (The response at other

gains will be similar.)

The 3 dB bandwidth is somewhat dependent on the power supply

voltage. As the supply voltage is decreased for example, the

magnitude of internal junction capacitances is increased, causing

a reduction in closed-loop bandwidth. To compensate for this,

smaller values of feedback resistor are used at lower supply

voltages.

REV. D

–9–

AD811

Driving Capacitive Loads

100

90

80

70

60

50

40

30

20

10

0

The feedback and gain resistor values in Table I will result in

very flat closed-loop responses in applications where the load

capacitances are below 10 pF. Capacitances greater than this

will result in increased peaking and overshoot, although not

necessarily in a sustained oscillation.

G = +2

= ؎15V

V

S

R

VALUE SPECIFIED

S

IS FOR FLATTEST

FREQUENCY RESPONSE

There are at least two very effective ways to compensate for this

effect. One way is to increase the magnitude of the feedback

resistor, which lowers the 3 dB frequency. The other method is

to include a small resistor in series with the output of the ampli-

fier to isolate it from the load capacitance. The results of these

two techniques are illustrated in Figure 32. Using a 1.5 kΩ

feedback resistor, the output ripple is less than 0.5 dB when driv-

ing 100 pF. The main disadvantage of this method is that it

sacrifices a little bit of gain flatness for increased capacitive load

drive capability. With the second method, using a series resistor,

the loss of flatness does not occur.

10

100

LOAD CAPACITANCE – pF

1000

Figure 33. Recommended Value of Series Resistor vs. the

Amount of Capacitive Load

R

FB

Figure 33 shows recommended resistor values for different load

capacitances. Refer again to Figure 32 for an example of the

results of this method. Note that it may be necessary to adjust

the gain setting resistor, R_G, to correct for the attenuation which

results due to the divider formed by the series resistor, R_S, and

the load resistance.

+V

S

0.1␮F

R

G

R

(OPTIONAL)

S

V

Applications which require driving a large load capacitance at a

high slew rate are often limited by the output current available

from the driving amplifier. For example, an amplifier limited to

25 mA output current cannot drive a 500 pF load at a slew rate

greater than 50 V/µs. However, because of the AD811’s 100 mA

output current, a slew rate of 200 V/µs is achievable when driv-

ing this same 500 pF capacitor (see Figure 34).

OUT

AD811

V

IN

C

R

L

T

0.1␮F

–V

S

2V

100ns

Figure 31. Recommended Connection for Driving a Large

Capacitive Load

100

90

V

IN

12

R

= 1.5k⍀

= 0

FB

9

6

S

10

V

OUT

3

G = +2

= ؎15V

0%

R

= 649⍀

= 30⍀

V

FB

S

R

C

= 10k⍀

= 100pF

S

L

5V

0

Figure 34. Output Waveform of an AD811 Driving a

500 pF Load. Gain = +2, R_FB= 649 Ω, R_S= 15 Ω,

R_S= 10 kΩ

–3

–6

1M

10M

FREQUENCY – Hz

100M

Figure 32. Performance Comparison of Two Methods for

Driving a Capacitive Load

–10–

REV. D

AD811

Operation as a Video Line Driver

The AD811 has been designed to offer outstanding perfor-

mance at closed-loop gains of one or greater, while driving

multiple reverse-terminated video loads. The lowest differential

gain and phase errors will be obtained when using ±15 volt

power supplies. With ±12 volt supplies, there will be an insig-

nificant increase in these errors and a slight improvement in

gain flatness. Due to power dissipation considerations, ±12 volt

supplies are recommended for optimum video performance.

Excellent performance can be achieved at much lower supplies

as well.

1V

10ns

100

90

V

IN

10

V

OUT

0%

The closed-loop gain vs. frequency at different supply voltages

is shown in Figure 36. Figure 37 is an oscilloscope photograph

of an AD811 line driver’s pulse response with ±15 volt supplies.

The differential gain and phase error vs. supply are plotted in

Figures 38 and 39, respectively.

1V

Figure 37. Small Signal Pulse Response, Gain = +2,

V_S= ±15 V

Another important consideration when driving multiple cables

is the high frequency isolation between the outputs of the

cables. Due to its low output impedance, the AD811 achieves

better than 40 dB of output to output isolation at 5 MHz driv-

ing back terminated 75 Ω cables.

0.10

R = 649⍀

0.09

0.08

0.07

0.06

0.05

0.04

0.03

0.02

0.01

F

= 3.58MHz

C

100 IRE

MODULATED

RAMP

75⍀ CABLE

649⍀

V

#1

OUT

75⍀

+V

75⍀

S

a. DRIVING A SINGLE, BACK TERMINATED,

75⍀ COAX CABLE

DRIVING TWO PARALLEL,

0.1␮F

b.

BACK TERMINATED, COAX CABLES

75⍀ CABLE

b

V

#2

OUT

AD811

75⍀

75⍀ CABLE

75⍀

V

IN

75⍀

a

5

6

7

8

9

10

11

12

13

14

15

SUPPLY VOLTAGE – ؎Volts

0.1␮F

Figure 38. Differential Gain Error vs. Supply Voltage for

the Video Line Driver of Figure 35

–V

S

Figure 35. A Video Line Driver Operating at a Gain of +2

0.20

12

R

= 649⍀

= 3.58MHz

F

0.18

0.16

0.14

0.12

0.10

0.08

0.06

0.04

0.02

F

C

G = +2

100 IRE

MODULATED

RAMP

V

R

= ؎15V

S

R

= 150⍀

= R

9

6

L

= 649⍀

FB

G

FB

a.DRIVING A SINGLE, BACK TERMINATED,

75⍀ COAX CABLE

DRIVING TWO PARALLEL,

b.

3

BACK TERMINATED, COAX CABLES

V

= ؎5V

S

R

= 562⍀

FB

b

0

–3

–6

a

5

6

7

8

9

10

11

12

13

14

15

1

10

FREQUENCY – MHz

100

SUPPLY VOLTAGE – ؎Volts

Figure 39. Differential Phase Error vs. Supply Voltage for

the Video Line Driver of Figure 35

Figure 36. Closed-Loop Gain vs. Frequency, Gain = +2

REV. D

–11–

AD811

An 80 MHz Voltage-Controlled Amplifier Circuit

The gain can be increased to 20 dB (×10) by raising R8 and R9

to 1.27 kΩ, with a corresponding decrease in –3 dB bandwidth

to about 25 MHz. The maximum output voltage under these

conditions will be increased to ±9 V using ±12 V supplies.

The voltage-controlled amplifier (VCA) circuit of Figure 40

shows the AD811 being used with the AD834, a 500 MHz,

4-quadrant multiplier. The AD834 multiplies the signal input

by the dc control voltage, V_G. The AD834 outputs are in the

form of differential currents from a pair of open collectors,

ensuring that the full bandwidth of the multiplier (which ex-

ceeds 500 MHz) is available for certain applications. Here,

the AD811 op amp provides a buffered, single-ended ground-

referenced output. Using feedback resistors R8 and R9 of

511 Ω, the overall gain ranges from –70 dB, for V_G= 0 dB to

+12 dB, (a numerical gain of four), when V_G= +1 V. The over-

all transfer function of the VCA is:

The gain-control input voltage, V_G, may be a positive or nega-

tive ground-referenced voltage, or fully differential, depending

on the user’s choice of connections at Pins 7 and 8. A positive

value of V_Gresults in an overall noninverting response. Revers-

ing the sign of V_Gsimply causes the sign of the overall response

to invert. In fact, although this circuit has been classified as a

voltage-controlled amplifier, it is also quite useful as a general-

purpose four-quadrant multiplier, with good load-driving capa-

bilities and fully-symmetrical responses from X- and Y-inputs.

V

_OUT= 4 (X1 – X2)(Y1 – Y2)

The AD811 and AD834 can both be operated from power

supply voltages of ±5 V. While it is not necessary to power them

from the same supplies, the common-mode voltage at W1 and

W2 must be biased within the common-mode range of the

AD811’s input stage. To achieve the lowest differential gain and

phase errors, it is recommended that the AD811 be operated

from power supply voltages of ±10 volts or greater. This VCA

circuit is designed to operate from a ±12 volt dual power

supply.

which reduces to V_OUT= 4 V_GV_INusing the labeling conven-

tions shown in Figure 40. The circuit’s –3 dB bandwidth of

80 MHz, is maintained essentially constant—independent of

gain. The response can be maintained flat to within ±0.1 dB

from dc to 40 MHz at full gain with the addition of an optional

capacitor of about 0.3 pF across the feedback resistor R8. The

circuit produces a full-scale output of ±4 V for a ±1 V input,

and can drive a reverse-terminated load of 50 Ω or 75 Ω to ±2 V.

FB

+12V

C1

0.1␮F

R1 100⍀

R8*

+

V

G

–

R2 100⍀

8

7

6

5

R4

182⍀

R6

294⍀

X2

X1 +V

W1

S

U1

AD834

U3

AD811

V

OUT

–V

3

S

Y1 Y2

W2

4

R7

294⍀

R5

182⍀

R

L

1

2

V

IN

R9*

R3

249⍀

C2

0.1␮F

–12V

FB

*R8 = R9 = 511⍀ FOR X4 GAIN

= 1.27k⍀ FOR X10 GAIN

Figure 40. An 80 MHz Voltage-Controlled Amplifier

–12–

REV. D

AD811

A Video Keyer Circuit

The bias currents required at the output of the multipliers are

provided by R8 and R9. A dc-level-shifting network comprising

R10/R12 and R11/R13 ensures that the input nodes of the

AD811 are positioned at a voltage within its common-mode

range. At high frequencies C1 and C2 bypass R10 and R11

respectively. R14 is included to lower the HF loop gain, and is

needed because the voltage-to-current conversion in the

AD834s, via the Y2 inputs, results in an effective value of the

feedback resistance of 250 Ω; this is only about half the value

required for optimum flatness in the AD811’s response. (Note

that this resistance is unaffected by G: when G = 1, all the

feedback is via U1, while when G = 0 it is all via U2). R14

reduces the fractional amount of output current from the multi-

pliers into the current-summing inverting input of the AD811,

by sharing it with R8. This resistor can be used to adjust the

bandwidth and damping factor to best suit the application.

By using two AD834 multipliers, an AD811, and a 1 V dc

source, a special form of a two-input VCA circuit called a

video keyer can be assembled. “Keying” is the term used in

reference to blending two or more video sources under the

control of a third signal or signals to create such special effects

as dissolves and overlays. The circuit shown in Figure 41 is a

two-input keyer, with video inputs V_Aand V_B, and a control

input V_G. The transfer function (with V_OUTat the load) is

given by:

V_OUT= G V_A+ (1–G) V_B

where G is a dimensionless variable (actually, just the gain of

the “A” signal path) that ranges from 0 when V_G= 0, to 1

when V_G= +1 V. Thus, V_OUTvaries continuously between V_A

and V_Bas G varies from 0 to 1.

Circuit operation is straightforward. Consider first the signal

path through U1, which handles video input V_A. Its gain is

clearly zero when V_G= 0 and the scaling we have chosen

ensures that it is unity when V_G= +1 V; this takes care of the

first term of the transfer function. On the other hand, the V_G

input to U2 is taken to the inverting input X2 while X1 is

biased at an accurate +1 V. Thus, when V_G= 0, the response

to video input V_Bis already at its full-scale value of unity,

whereas when V_G= +1 V, the differential input X1–X2 is zero.

This generates the second term.

To generate the 1 V dc needed for the “1–G” term an AD589

reference supplies 1.225 V ± 25 mV to a voltage divider consist-

ing of resistors R2 through R4. Potentiometer R3 should be

adjusted to provide exactly +1 V at the X1 input.

In this case, we have shown an arrangement using dual supplies

of ±5 V for both the AD834 and the AD811. Also, the overall

gain in this case is arranged to be unity at the load, when it is

driven from a reverse-terminated 75 Ω line. This means that the

“dual VCA” has to operate at a maximum gain of 2, rather

C1

+5V

R7

R14

0.1␮F

SETUP FOR DRIVING

REVERSE-TERMINATED LOAD

SEE TEXT

45.3⍀

R10

2.49k⍀

Z

V

OUT

O

R5

TO PIN 6

AD811

113⍀

V

R6

226⍀

G

Z

200⍀

O

(0 TO +1V dc)

TO Y2

8

7

6

5

X2

X1 +V

W1

S

+5V

R1

INSET

R8

29.4⍀

U1

AD834

R12

6.98k⍀

U4

1.87k⍀

AD589

+5V

Y1 Y2 –V

W2

4

S

R2

174⍀

2

1

3

V

A

FB

C3

0.1␮F

(؎1V FS)

–5V

+5V

R3

100⍀

LOAD

GND

U3

AD811

R9

29.4⍀

R13

6.98k⍀

8

7

6

5

V

OUT

R4

1.02k⍀

X2

W1

X1 +V

S

C4

0.1␮F

C2

0.1␮F

U1

AD834

Y1 Y2 –V

W2

4

S

LOAD

GND

FB

2

1

3

R11

2.49k⍀

V

B

–5V

(؎1V FS)

Figure 41. A Practical Video Keyer Circuit

REV. D

–13–

AD811

than 4 as in the VCA circuit of Figure 40. However, this cannot

be achieved by lowering the feedback resistor, since below a

critical value (not much less than 500 Ω) the AD811’s peaking

may be unacceptable. This is because the dominant pole in the

open-loop ac response of a current-feedback amplifier is con-

trolled by this feedback resistor. It would be possible to operate

at a gain of X4 and then attenuate the signal at the output.

Instead, we have chosen to attenuate the signals by 6 dB at the

input to the AD811; this is the function of R8 through R11.

R14 = 49.9⍀

0

–10

–20

–30

–40

–50

–60

–70

–80

GAIN

R14 = 137⍀

ADJACENT

CHANNEL

FEEDTHROUGH

Figure 42 is a plot of the ac response of the feedback keyer,

when driving a reverse terminated 50 Ω cable. Output noise and

adjacent channel feedthrough, with either channel fully off and

the other fully on, is about –50 dB to 10 MHz. The feedthrough

at 100 MHz is limited primarily by board layout. For V_G= +1 V,

the –3 dB bandwidth is 15 MHz when using a 137 Ω resistor for

R14 and 70 MHz with R14 = 49.9 Ω. For further information

regarding the design and operation of the VCA and video keyer

circuits, refer to the application note “Video VCA’s and Keyers

Using the AD834 & AD811” by Brunner, Clarke, and Gilbert,

available FREE from Analog Devices.

10k

100k

1M

FREQUENCY – Hz

10M

100M

Figure 42. A Plot of the AC Response of the Video Keyer

–14–

REV. D

AD811

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

8- Lead Plastic DIP (N) Package

20-Lead LCC (E-20A) Package

0.082 ± 0.018

(2.085 ± 0.455)

0.39 (9.91)

MAX

0.350 ± 0.008 SQ

(8.89 ± 0.20) SQ

0.040 x 45°

(1.02 x 45°)

REF 3 PLCS

8

5

0.31

(7.87)

0.25

(6.35)

1

4

0.025 ± 0.003

(0.635 ± 0.075)

PIN 1

0.30 (7.62)

REF

NO. 1 PIN

INDEX

0.10 (2.54)

BSC

0.035 ؎ 0.01

(0.89 ؎ 0.25)

0.050

(1.27)

0.165 ؎ 0.01

(4.19 ؎ 0.25)

0.011 ؎0.003

(0.28 ؎ 0.08)

0.020 x 45°

(0.51 x 45°)

REF

0.18 ؎0.03

(4.57 ؎ 0.75)

0.125 (3.18)

MIN

15؇

0؇

0.018 ؎0.003

(0.46 ؎ 0.08)

SEATING

PLANE

0.033

(0.84)

NOM

16-Lead SOIC (R-16) Package

8-Lead Cerdip (Q) Package

9

16

0.005 (0.13) 0.055 (1.4)

0.299 (7.60)

0.291 (7.40)

MIN

MAX

8

5

0.419 (10.65)

PIN 1

0.404 (10.26)

8

0.310 (7.87)

0.220 (5.59)

1

PIN 1

1

4

0.100 (2.54) BSC

0.405 (10.29) MAX

0.107 (2.72)

0.413 (10.50)

0.398 (10.10)

0.320 (8.13)

0.290 (7.37)

0.089 (2.26)

0.364 (9.246)

0.344 (8.738)

0.060 (1.52)

0.015 (0.38)

0.200.(5.08)

MAX

0.150

(3.81)

MIN

0.045 (1.15)

0.020 (0.50)

0.200 (5.08)

0.125 (3.18)

0.010 (0.25)

0.004 (0.10)

0.050 (1.27)

BSC

0.018 (0.46)

0.014 (0.36)

0.015 (0.38)

0.007 (1.18)

0.015 (0.38)

0.008 (0.20)

SEATING

PLANE

15°

0°

0.023 (0.58) 0.070 (1.78)

0.014 (0.36) 0.030 (0.76)

20-Lead Wide Body SOIC (R-20) Package

8-Lead SOIC (SO-8) Package

0.512 (13.00)

0.496 (12.60)

0.1968 (5.00)

0.1890 (4.80)

20

11

8

1

5

4

0.2440 (6.20)

0.2284 (5.80)

0.1574 (4.00)

0.1497 (3.80)

0.300 (7.60)

0.292 (7.40)

0.419 (10.65)

PIN 1

0.394 (10.00)

0.0196 (0.50)

0.0099 (0.25)

0.0500 (1.27)

BSC

10

1

؋

45؇

0.0688 (1.75)

0.0532 (1.35)

0.0098 (0.25)

0.0040 (0.10)

SEATING

PLANE

0.50 (1.27)

BSC

0.019 (0.48)

0.014 (0.36)

8؇

0؇

0.0500 (1.27)

0.0160 (0.41)

0.0192 (0.49)

0.0138 (0.35)

0.0098 (0.25)

0.0075 (0.19)

0.104 (2.64)

0.093 (2.36)

0.011 (0.28)

0.004 (0.10)

0.015 (0.38)

0.007 (0.18)

0.050 (1.27)

0.016 (0.40)

REV. D

–15–

型号:	AD811AN
是否无铅：	含铅
是否Rohs认证：	不符合
生命周期：	Active
零件包装代码：	DIP
包装说明：	PLASTIC, MO-095AA, DIP-8
针数：	8
Reach Compliance Code：	unknown
风险等级：	5.62
标称带宽：	140000 kHz
商用集成电路类型：	VIDEO AMPLIFIER
JESD-30 代码：	R-PDIP-T8
JESD-609代码：	e0
长度：	9.27 mm
湿度敏感等级：	NOT APPLICABLE
信道数量：	1
功能数量：	1
端子数量：	8
最高工作温度：	85 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP
封装形状：	RECTANGULAR
封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT APPLICABLE
认证状态：	COMMERCIAL
座面最大高度：	4.44 mm
最大供电电压 (Vsup)：	18 V
最小供电电压 (Vsup)：	4.5 V
表面贴装：	NO
温度等级：	INDUSTRIAL
端子面层：	TIN LEAD
端子形式：	THROUGH-HOLE
端子节距：	2.54 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT APPLICABLE
宽度：	7.62 mm
Base Number Matches：	1

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