bq2201
SRAM Nonvolatile Controller Unit
During a power failure, the external
Features
General Description
SRAM is switched from the VCC
supply to one of two 3V backup sup-
➤ Power monitoring and switching
for 3-volt battery-backup applica-
tions
The CMOS bq2201 SRAM Nonvolatile
plies. On a subsequent power-up, the
Controller Unit provides all necessary
SRAM is write-protected until a
functions for converting a standard
power-valid condition exists.
CMOS SRAM into nonvolatile
➤ Write-protect control
read/write memory.
The bq2201 is footprint- and timing-
compatible with industry stan-
dards with the added benefit of a
chip-enable propagation delay of
less than 10ns.
➤ 3-volt primary cell inputs
A precision comparator monitors the
5V VCC input for an out-of-tolerance
condition. When out of tolerance is
detected, a conditioned chip-enable
output is forced inactive to write-
protect any standard CMOS SRAM.
➤ Less than 10ns chip-enable
propagation delay
➤ 5% or 10% supply operation
Pin Connections
Pin Names
VOUT
Supply output
BC1—BC2 3-volt primary backup cell inputs
NC
1
2
3
4
5
6
16
15
14
13
12
11
NC
THS
CE
Threshold select input
chip-enable active low input
Conditioned chip-enable output
+5-volt supply input
Ground
VOUT
NC
VCC
NC
V
1
2
3
4
8
7
6
5
V
CC
OUT
CECON
VCC
VSS
BC
2
BC
CE
CE
BC2
NC
BC1
NC
1
THS
CON
THS
NC
CECON
V
SS
7
8
10
9
NC
CE
NC
No Connect
8-Pin Narrow DIP or SOIC
V
SS
PN220101.eps
16-Pin SOIC
PN2201E.eps
Functional Description
An external CMOS static RAM can be battery-backed
using the VOUT and the conditioned chip-enable output
pin from the bq2201. As VCC slews down during a power
failure, the conditioned chip-enable output CECON is
forced inactive independent of the chip-enable input CE.
If THS is tied to VSS, power-fail detection occurs at 4.62V
typical for 5% supply operation. If THS is tied to VCC
power-fail detection occurs at 4.37V typical for 10% sup-
ply operation. The THS pin must be tied to VSS or VCC for
proper operation.
,
This activity unconditionally write-protects external If a memory access is in process during power-fail detec-
SRAM as VCC falls to an out-of-tolerance threshold VPFD
.
tion, that memory cycle continues to completion before the
memory is write-protected. If the memory cycle is not ter-
minated within time tWPT, the CECON output is uncondi-
tionally driven high, write-protecting the memory.
VPFD is selected by the threshold select input pin, THS.
Oct. 1998 D
1