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产品型号CBT3125PW的概述

芯片CBT3125PW的概述 CBT3125PW是一款高性能的开关芯片，广泛应用于各种电子设备中，如通信、计算机、以及工业自动化等领域。该芯片采用了先进的CMOS工艺，具有低功耗和高速切换的特点，能够有效地控制信号的传输与切换。CBT3125PW的设计旨在满足高频信号的处理需求，同时提供高达5V的工作电压范围，确保在各种工作环境下的稳定性和可靠性。芯片CBT3125PW的详细参数 CBT3125PW具备多种出色的参数，这使其在开关电路设计中表现优异。以下是该芯片的一些关键技术参数： - 工作电压：2.0V至5.5V - 输入电流（Iin）：最大为 ±1μA - 输出电流（Iout）：最大为 ±20mA - 开关电阻（Ron）：典型值为 0.5Ω（在3.3V时） - 控制电压（Vcontrol）：高电平≥ 2.0V, 低电平≤ 0.8V - 工作温度范围：-40°C至+125°C - ...

产品型号CBT3125PW的Datasheet PDF文件预览

INTEGRATED CIRCUITS

CBT3125

Quadruple FET bus switch

Product data

2001 Dec 12

File under Integrated Circuits — ICL03

Philips

Semiconductors

Philips Semiconductors

Product data

Quadruple FET bus switch

CBT3125

DESCRIPTION

PIN CONFIGURATION

The CBT3125 quadruple FET bus switch features independent line

switches. Each switch is disabled when the associated Output

Enable (OE) input is HIGH.

1OE

14 V

13 4OE

12 4A

FEATURES

2OE

11 4B

• Standard ’125-type pinout (D, DB, and PW packages)

10 3OE

• 5 Ω switch connection between two ports

• TTL-compatible input levels

GND

SA00562

• Latch-up testing is done to JESDEC Standard JESD78 which

exceeds 500 mA

Figure 1. SO14, SSOP14, and TSSOP14

• ESD protection exceeds 2000 V HBM per JESD22-A114,

200 V MM per JESD22-A115, and 1000 V CDM per

JESD22-C101

1OE

16 V

15 4OE

14 4A

13 4B

12 3OE

11 3A

10 3B

2OE

GND

SA00563

NC = no internal connection

Figure 2. SSOP(QSOP)16

ORDERING INFORMATION

PACKAGES

14-Pin Plastic SO

TEMPERATURE RANGE

–40 to +85 °C

ORDER CODE

DRAWING NUMBER

SOT108-1

CBT3125D

CBT3125DB

CBT3125DS

CBT3125PW

14-Pin Plastic SSOP

–40 to +85 °C

SOT337-1

16-Pin Plastic SSOP(QSOP)

14-Pin Plastic TSSOP

–40 to +85 °C

SOT519-1

–40 to +85 °C

SOT402-1

Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.

2001 Dec 12

853-2309 27452

Philips Semiconductors

Product data

Quadruple FET bus switch

CBT3125

LOGIC DIAGRAM

FUNCTION TABLE (each bus switch)

INPUT

FUNCTION

A = B

1OE

disconnect

2OE

3OE

4OE

SA00564

Pin numbers shown are for 14-pin package-types.

Figure 3. CBT3125 logic diagram (positive logic)

ABSOLUTE MAXIMUM RATINGS

Over operating free-air temperature range, unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN.

–0.5

—

MAX.

UNIT

supply voltage range

input voltage range

see Note 2

continuous channel current

input clamp current

128

–50

+150

°C

I/O

< 0

—

stg

storage temperature range

–65

NOTES:

1. Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only,

and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions”

is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

3. The package thermal impedance is calculated in accordance with JESD 51-7.

RECOMMENDED OPERATING CONDITIONS

SYMBOL

PARAMETER

CONDITIONS

MIN.

4.5

MAX.

5.5

UNIT

supply voltage

high-level control input voltage

—

low-level control input voltage

—

0.8

amb

operating ambient temperature in free-air

–40

+85

°C

NOTE:

1. All unused control inputs of the device must be held at V or GND to ensure proper device operation.

2001 Dec 12

Philips Semiconductors

Product data

Quadruple FET bus switch

CBT3125

DC ELECTRICAL CHARACTERISTICS

Over recommended operating free-air temperature range, unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

= 4.5 V;

Input clamp voltage

—

–1.2

I = –18 mA

= 5.5 V;

Input leakage current

—

±1

µA

V = 5.5 V or GND

= 5.5 V; I = 0;

Quiescent supply current

V = V or GND

= 5.5 V;

Additional supply current per

input pin (Note 2)

one input at 3.4 V,

other inputs at V or GND

∆I

control inputs

—

2.5

Input capacitance

control inputs V = 3 V or 0

—

1.7

3.4

3.8

—

Power-off leakage current

Pass gate voltage

= 3 V or 0; OE = V

IO(OFF)

= 5.0 V; V = 5.0 V

= 4.5 V; V = 0 V;

—

Ω

I = 64 mA

= 4.5 V; V = 0 V;

On-resistance (Note 3)

I = 30 mA

= 4.5 V; V = 2.4 V;

I = –15 mA

NOTES:

1. All typical values are at V = 5 V, unless otherwise noted. T

= 25 °C.

amb

2. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V or GND.

3. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is

determined by the lower of the voltages of the two (A or B) terminals.

AC CHARACTERISTICS

amb

= –40 to +85 °C; C = 50 pF, unless otherwise noted.

= 5 V ± 0.5 V

FROM

(INPUT)

(OUTPUT)

SYMBOL

PARAMETER

UNIT

Min

Max

Propagation delay

A or B

B or A

A or B

—

0.25

5.4

Output enable time

to High and Low level

1.0

Output disable time

from High and Low level

dis

A or B

4.7

NOTE:

1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state

resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).

2001 Dec 12

Philips Semiconductors

Product data

Quadruple FET bus switch

CBT3125

AC WAVEFORMS

TEST CIRCUIT

= 1.5 V, V = GND to 3.0V

7 V

3 V

0 V

500 Ω

From Output

Under Test

Open

GND

1.5 V

INPUT

500 Ω

= 50 pF

PHL

PLH

Load Circuit

1.5 V

TEST

OUTPUT

open

7 V

PLZ PZL

SA00028

open

PHZ PZH

and t

are the same as t .

PLH

PHL pd

DEFINITIONS

Waveform 1. Input to Output Propagation Delays

Load capacitance includes jig and probe capacitance;

see AC CHARACTERISTICS for value.

SA00012

3 V

and t

are the same as t

dis

PLZ

PHZ

Output Control

1.5 V

are the same as t

PZL

PZH

0 V

PLZ

PZL

3.5 V

NOTES:

1. All input pulses are supplied by generators having the following

characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns,

Output

Waveform 1

S1 at 7 V

1.5 V

+ 0.3 V

– 0.3 V

t ≤ 2.5 ns.

(see Note)

2. The outputs are measured one at a time with one transition per

measurement.

PHZ

PZH

Output

Waveform 2

S1 at Open

(see Note)

0 V

Note:

Waveform 1 is for an output with internal conditions such that

the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that

the output is high except when disabled by the output control.

SA00558

and t

are the same as t

dis

PLZ

PHZ

are the same as t

PZL

PZH

Waveform 2. Output Enable and Disable Times

2001 Dec 12

Philips Semiconductors

Product data

Quadruple FET bus switch

CBT3125

SO14: plastic small outline package; 14 leads; body width 3.9 mm

SOT108-1

2001 Dec 12

Philips Semiconductors

Product data

Quadruple FET bus switch

CBT3125

SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm

SOT337-1

2001 Dec 12

Philips Semiconductors

Product data

Quadruple FET bus switch

CBT3125

SSOP16: plastic shrink small outline package; 16 leads;

body width 3.9 mm; lead pitch 0.635 mm

SOT519-1

2001 Dec 12

Philips Semiconductors

Product data

Quadruple FET bus switch

CBT3125

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm

SOT402-1

2001 Dec 12

Philips Semiconductors

Product data

Quadruple FET bus switch

CBT3125

Data sheet status

Product

status

Definitions

[1]

Data sheet status

[2]

Objective data

Development

This data sheet contains data from the objective specification for product development.

Philips Semiconductors reserves the right to change the specification in any manner without notice.

Preliminary data

Product data

Qualification

Production

This data sheet contains data from the preliminary specification. Supplementary data will be

published at a later date. Philips Semiconductors reserves the right to change the specification

without notice, in order to improve the design and supply the best possible product.

This data sheet contains data from the product specification. Philips Semiconductors reserves the

right to make changes at any time in order to improve the design, manufacturing and supply.

Changes will be communicated according to the Customer Product/Process Change Notification

(CPCN) procedure SNW-SQ-650A.

[1] Please consult the most recently issued data sheet before initiating or completing a design.

[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL

http://www.semiconductors.philips.com.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.

Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or

at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended

periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips

Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or

modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications

do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard

cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no

responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these

products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless

otherwise specified.

Koninklijke Philips Electronics N.V. 2001

Contact information

For additional information please visit

http://www.semiconductors.philips.com.

Fax: +31 40 27 24825

Date of release: 12-01

9397 750 09218

For sales offices addresses send e-mail to:

sales.addresses@www.semiconductors.philips.com.

Document order number:

Philips

Semiconductors

2001 Dec 12

CBT3125PW相关文章

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CBT3125PW产品参数

型号:	CBT3125PW
是否Rohs认证：	符合
生命周期：	Active
包装说明：	TSSOP,
Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01
风险等级：	5.6
Is Samacsys：	N
系列：	CBT/FST/QS/5C/B
JESD-30 代码：	R-PDSO-G14
JESD-609代码：	e4
长度：	5 mm
逻辑集成电路类型：	BUS DRIVER
湿度敏感等级：	1
位数：	1
功能数量：	4
端口数量：	2
端子数量：	14
最高工作温度：	85 °C
最低工作温度：	-40 °C
输出特性：	3-STATE
输出极性：	TRUE
封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	260
座面最大高度：	1.1 mm
最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V
表面贴装：	YES
技术：	CMOS
温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING
端子节距：	0.65 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	30
宽度：	4.4 mm
Base Number Matches：	1

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