It is recommended that a 0.1µF low ESR capacitor is
connected close to the output pin and ground to reduce noise
on the output. The capacitor values listed are minimum
values. If lower ripple is required then the filter capacitor
should be increased in value to 0.47µF.
pulled low, the DCR01 will be disabled. The disable time
depends upon the external loading. The internal disable
function is implemented in 2µs. Removal of the pull down
will enable the DCR01.
Capacitance loading on the SYNC pin should be minimized
in order to prevent a reduction in the internal oscillator‘s
frequency. See Application Bulletin AB-153 External Syn-
chronization of the DCP01/02 Series of DC/DC Converters.
This document contains information on how to null the
effects of additional capacitance on the sync pin. The oscil-
lators frequency can be measured at VREC, as this is the
fundamental frequency of the ripple component.
NOTE: As with all switching power supplies the best
performance is only obtained with low ESR capacitors
connected close to the switcher. If low ESR capacitors are
not used, the ESR will generate a voltage drop when the
capacitor is supplying the load power. Often a larger capaci-
tor is chosen for this purpose when a low ESR smaller
capacitance would perform as well.
PCB LAYOUT
OUTPUT ENABLE/DISABLE
RIPPLE AND NOISE
The regulated output of the DCR01 can be disabled by
pulling the ENABLE pin low. Holding the ENABLE pin
high enables the regulated output voltage, thus allowing the
output to be controlled from the isolated side.
Careful consideration should be given to the layout of the
PCB in order for the best results to be obtained.
The DCR01 is a switching power supply and as such can
place high peak current demands on the input supply. In
order to avoid the supply falling momentarily during the fast
switching pulses, ground and power planes should be used
to track the power to the input of DCR01, this will also serve
to reduce noise on the circuit. If this is not possible, the
supplies must be connected in a star formation, with the
tracks made as wide as possible.
ERROR FLAG
The DCR01 has an Error pin which provides a ‘power good’
flag, as long as the internal regulator is in regulation.
DECOUPLING
If the SYNC pin is being used, the tracking between device
SYNC pins should be short to avoid stray capacitance. If the
SYNC pin is not being used it is advisable to place a guard
ring (connected to input ground) around this pin to avoid any
noise pick up.
Ripple Reduction
Due to the very low forward resistance of the DMOS
switching transistors, high current demands are placed upon
the input supply for a short time. By using a good quality
low Equivalent Series Resistance (ESR) capacitor of 2.2µF
(minimum) for the 5V input devices and a 0.47µF capacitor
for the 12V and 24V devices, placed close to the IC supply
input pins, the effects on the power supply can be mini-
mized.
The output should be taken from the device using ground
and power planes. This will ensure minimum losses.
A good quality low ESR capacitor placed as close as
practicable across the input will reduce reflected ripple and
ensure a smooth start up.
The high switching frequency of 400kHz allows relatively
small values of capacitors to be used for filtering the recti-
fied output voltage. A good quality low ESR capacitor of
1µF placed close to the VREC pin and output ground will
reduce the ripple.
A good quality low ESR capacitor placed as close as
practicable across the rectifier output terminal and output
ground will give the best ripple and noise performance.
THERMAL MANAGEMENT
It is not recommended that the DCR01 be fitted using an
IC socket as this will degrade performance.
Due to the high power density of this device, it is advisable
to provide a ground plane on the output. The output regula-
tor is mounted on a copper leadframe, and a ground plane
will serve as an efficient heatsink.
The output at VREC is full wave rectified and produces a
ripple of 800kHz.
®
8
DCR01