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产品型号DRV8872DDAR的概述

芯片DRV8872DDAR的概述 DRV8872DDAR是一款高性能的直流电机驱动芯片，专为控制直流和步进电机而设计。此芯片由德州仪器（Texas Instruments）生产，广泛应用于自动化、机器人、家居电器、电子玩具等领域。DRV8872DDAR集成了诸多保护功能，能够在复杂的使用环境中提供可靠的电机驱动解决方案。此芯片的设计目标是为开发人员提供一个易于使用、功能强大的电机驱动器。DRV8872DDAR能够支持高达3A的输出电流，使得其在驱动各类电机设备时具有良好的灵活性和适应性。此外，其内建的电流限制功能能够有效保护设备，延长使用寿命。 DRV8872DDAR的详细参数 DRV8872DDAR的主要参数如下： - 最大输出电流：3A - 工作电压范围：2.5V至10.8V - 拓扑结构：H桥 - PWM频率：最大100kHz - 待机功耗：20μA（典型值） - 保护功能：过...

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DRV8872

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

DRV8872具有故障报告功能的 3.6A 刷式直流电机驱动器（PWM 控制）

1 特性

3 说明

•

H 桥电机驱动器

DRV8872 器件是一款刷式直流 (BDC) 电机驱动器，

适用于打印机、电器、工业设备和其他小型机器。两个

逻辑输入控制 H 桥驱动器，该驱动器由四个 N 沟道金

属氧化物半导体场效应晶体管 (MOSFET) 组成，能够

以高达 3.6A 的峰值电流执行双向电机控制。利用电流

衰减模式，可通过对输入进行脉宽调制 (PWM) 来控制

电机转速。如果将两个输入均置为低电平，则电机驱动

器将进入低功耗休眠模式。

–

驱动一个直流电机、一个步进电机的绕组或其他

负载

•

6.5V 至 45V 宽工作电压范围

565mΩ（典型值）R_DS(on)(HS + LS)

3.6A 峰值电流驱动能力

脉宽调制 (PWM) 控制接口

集成电流调节功能

低功耗休眠模式

DRV8872 器件具备集成电流调节功能。该功能基于

内部基准电压以及 ISEN 引脚电压（与流经外部感测电

阻的电机电流成正比）。该器件能够将电流限制在某一

已知水平，这可显著降低系统功耗要求，并且无需大容

量电容来维持稳定电压，尤其是在电机启动和停转时。

故障状态输出引脚

小型封装尺寸

–

8 引脚 HSOP 封装，带有 PowerPAD™

4.9mm × 6mm

•

集成保护功能

该器件针对故障和短路问题提供了全面保护，包括欠压

锁定 (UVLO)、过流保护 (OCP) 和热关断 (TSD)。通

过将 nFAULT 输出拉为低电平来报告故障。故障排除

后，器件自动恢复正常状态。

–

VM 欠压闭锁 (UVLO)

过流保护 (OCP)

热关断 (TSD)

故障报告 (nFAULT)

自动故障恢复

器件信息⁽¹⁾

器件型号

DRV8872

封装

HSOP (8)

封装尺寸（标称值）

2 应用范围

4.90mm x 6.00mm

•

打印机

(1) 要了解所有可用封装，请参见数据表末尾的可订购产品附录。

电器

工业设备

其他机电应用

H 桥状态

简化电路原理图

6.5 to 45 V

DRV8872

3.6 A

IN1

IN2

Brushed DC

Motor Driver

BDC

Controller

Current

Regulation

nFAULT

ISEN

Fault

Protection and

Reporting

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

English Data Sheet: SLVSCZ0

DRV8872

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

www.ti.com.cn

特性.......................................................................... 1

应用范围................................................................... 1

说明.......................................................................... 1

修订历史记录 ........................................................... 2

Pin Configuration and Functions......................... 3

Specifications......................................................... 3

6.1 Absolute Maximum Ratings ...................................... 3

6.2 ESD Ratings.............................................................. 4

6.3 Recommended Operating Conditions....................... 4

6.4 Thermal Information.................................................. 4

6.5 Electrical Characteristics........................................... 5

6.6 Typical Characteristics.............................................. 6

Detailed Description .............................................. 7

7.1 Overview ................................................................... 7

7.2 Functional Block Diagram ......................................... 7

7.3 Feature Description................................................... 8

7.4 Device Functional Modes........................................ 10

Application and Implementation ........................ 11

8.1 Application Information............................................ 11

8.2 Typical Application .................................................. 11

Power Supply Recommendations...................... 14

9.1 Bulk Capacitance .................................................... 14

10 Layout................................................................... 15

10.1 Layout Guidelines ................................................. 15

10.2 Layout Example .................................................... 15

10.3 Thermal Considerations....................................... 15

10.4 Power Dissipation ................................................. 15

11 器件和文档支持 ..................................................... 17

11.1 文档支持................................................................ 17

11.2 接收文档更新通知 ................................................. 17

11.3 社区资源................................................................ 17

11.4 商标....................................................................... 17

11.5 静电放电警告......................................................... 17

11.6 Glossary................................................................ 17

12 机械、封装和可订购信息....................................... 17

4 修订历史记录

注：之前版本的页码可能与当前版本有所不同。

Changes from Revision B (January 2016) to Revision C

Page

•

Deleted the power supply voltage ramp rate (VM) parameter from the Absolute Maximum Ratings table .......................... 3

Added the output current parameter to the Absolute Maximum Ratings table ...................................................................... 3

已添加接收文档更新通知部分.............................................................................................................................................. 17

Changes from Revision A (August 2015) to Revision B

Page

•

Updated the ƒ_PWMmax value and added a note .................................................................................................................... 4

Removed the redundant T_Acondition and added ƒ_PWM= 24 kHz .......................................................................................... 5

Added more information to clarify how the max RMS current varies for different applications ........................................... 12

Changes from Original (August 2015) to Revision A

Page

•

Updated conditions for 图 12 ............................................................................................................................................... 13

DRV8872

www.ti.com.cn

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

5 Pin Configuration and Functions

DDA Package

8-Pin HSOP With Exposed Thermal Pad

Top View

GND

IN2

OUT2

ISEN

OUT1

Thermal

Pad

IN1

nFAULT

Pin Functions

TYPE

PWR

DESCRIPTION

NAME

GND

NO.

Logic ground

Logic inputs

Connect to board ground.

IN1

IN2

Controls the H-bridge output. Has internal pulldowns. (See 表 1.)

If using current regulation, connect ISEN to a resistor (low-value,

ISEN

PWR

High-current ground path high-power-rating) to ground. If not using current regulation, connect

ISEN directly to ground.

Low-level indicates UVLO, TSD, or OCP fault. Connect to a pullup

nFAULT

Fault status (open-drain)

resistor.

OUT1

OUT2

H-bridge outputs

Connect directly to the motor, or other inductive load.

6.5-V to 45-V power

supply

Connect a 0.1-µF bypass capacitor to ground, as well as sufficient

bulk capacitance, rated for the VM voltage.

PWR

Connect to board ground. For good thermal dissipation, use large

ground planes on multiple layers, and multiple nearby vias

connecting those planes.

PAD

—

Thermal pad

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

MIN

–0.3

–0.7

–0.5

MAX

UNIT

Power supply voltage (VM)

Logic input voltage (IN1, IN2)

Fault pin (nFAULT)

Continuous phase node pin voltage (OUT1, OUT2)

Current sense input pin voltage (ISEN)⁽²⁾

Output current (100% duty cycle)

Operating junction temperature, T_J

Storage temperature, T_stg

VM + 0.7

3.5

–40

–65

150

°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Transients of ±1 V for less than 25 ns are acceptable

DRV8872

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

www.ti.com.cn

6.2 ESD Ratings

VALUE

±6000

±750

UNIT

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾

Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾

V_(ESD)

Electrostatic discharge

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

6.5

NOM

MAX

UNIT

V_I

Power supply voltage

Logic input voltage (IN1, IN2)

Logic input PWM frequency (IN1, IN2)

Peak output current⁽²⁾

5.5

200⁽¹⁾

f_PWM

I_peak

T_A

kHz

3.6

Operating ambient temperature

–40

125

°C

(1) The voltages applied to the inputs should have at least 800 ns of pulse width to ensure detection. Typical devices require at least 400

ns. If the PWM frequency is 200 kHz, the usable duty cycle range is 16% to 84%

(2) Power dissipation and thermal limits must be observed

6.4 Thermal Information

DRV8872

THERMAL METRIC⁽¹⁾

DDA (HSOP)

8 PINS

41.1

UNIT

R_θJA

Junction-to-ambient thermal resistance

°C/W

R_θJC(top)

R_θJB

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

53.1

23.1

ψ_JT

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

8.2

ψ_JB

R_θJC(bot)

2.7

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

DRV8872

www.ti.com.cn

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

6.5 Electrical Characteristics

T_A= 25°C, over recommended operating conditions (unless otherwise noted)

PARAMETER

POWER SUPPLY (VM)

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VM operating voltage

VM operating supply current

VM sleep current

6.5

I_VM

VM = 12 V

µA

µs

I_VMSLEEP

t_ON

VM = 12 V

Turn-on time⁽¹⁾

VM > V_UVLOwith IN1 or IN2 high

LOGIC-LEVEL INPUTS (IN1, IN2)

V_IL

Input logic low voltage

Input logic high voltage

Input logic hysteresis

Input logic low current

Input logic high current

Pulldown resistance

Propagation delay

0.5

V_IH

V_HYS

I_IL

1.5

–1

0.5

V_IN= 0 V

μA

kΩ

μs

I_IH

V_IN= 3.3 V

100

0.7

100

R_PD

t_PD

To GND

INx to OUTx change (see 图 6)

Inputs low to sleep

t_sleep

Time to sleep

1.5

MOTOR DRIVER OUTPUTS (OUT1, OUT2)

R_DS(ON)

t_DEAD

V_d

High-side FET on resistance

Low-side FET on resistance

Output dead time

VM = 24 V, I = 1 A, f_PWM= 25 kHz

307

258

220

0.8

360

320

mΩ

Body diode forward voltage

I_OUT= 1 A

CURRENT REGULATION

ISEN voltage for current

chopping

V_TRIP

0.32

0.35

0.38

t_OFF

PWM off-time

PWM blanking time

μs

t_BLANK

µs

PROTECTION CIRCUITS

VM falls until UVLO triggers

VM rises until operation recovers

Rising to falling threshold

6.1

6.3

6.4

6.5

V_UVLO

VM undervoltage lockout

V_UV,HYS

I_OCP

VM undervoltage hysteresis

100

3.7

180

Overcurrent protection trip

level

4.5

6.4

t_OCP

Overcurrent deglitch time

Overcurrent retry time

1.5

μs

t_RETRY

Thermal shutdown

temperature

T_SD

150

175

°C

T_HYS

Thermal shutdown hysteresis

nFAULT OPEN DRAIN OUTPUT

V_OL

I_OH

Output low voltage

I_O= 5 mA

V_O= 3.3 V

0.5

Output high leakage current

µA

(1) t_ONapplies when the device initially powers up, and when it exits sleep mode.

DRV8872

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

www.ti.com.cn

6.6 Typical Characteristics

1.6

1.5

1.4

1.3

1.2

1.1

0.37

0.36

0.35

0.34

0.33

0.9

0.8

0.7

-40

-20

100

120

140

-40

-20

100

120

140

Ambient Temperature (èC)

Temperature (°C)

D001

D003

图 1. R_DS(on)vs Temperature

图 2. V_TRIPvs Temperature

VM (V)

D004

图 3. I_VMSLEEPvs VM at 25°C

DRV8872

www.ti.com.cn

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

7 Detailed Description

7.1 Overview

The DRV8872 device is an optimized 8-pin device for driving brushed DC motors with 6.5 to 45 V and up to 3.6-

A peak current. The integrated current regulation restricts motor current to a predefined maximum. Two logic

inputs control the H-bridge driver, which consists of four N-channel MOSFETs that have a typical R_ds(on)of 565

mΩ (including one high-side and one low-side FET). A single power input, VM, serves as both device power and

the motor winding bias voltage. The integrated charge pump of the device boosts VM internally and fully

enhances the high-side FETs. Motor speed can be controlled with pulse-width modulation, at frequencies

between 0 to 100 kHz. The device has an integrated sleep mode that is entered by bringing both inputs low. An

assortment of protection features prevent the device from being damaged if a system fault occurs.

7.2 Functional Block Diagram

Power

VCP

Charge

Pump

OUT1

Gate

Driver

bulk

0.1 µF

OCP

GND

BDC

PPAD

VCP

OUT2

ISEN

IN1

IN2

Gate

Driver

Core

Logic

OCP

R_SENSE

nFAULT

V_TRIP

Protection Features

Overcurrent

Monitoring

Temperature

Sensor

Voltage

Monitoring

DRV8872

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

www.ti.com.cn

7.3 Feature Description

7.3.1 Bridge Control

The DRV8872 output consists of four N-channel MOSFETs that are designed to drive high current. These

MOSFETs are controlled by the two logic inputs IN1 and IN2, according to 表 1.

表 1. H-Bridge Control

IN1

IN2

OUT1

OUT2

DESCRIPTION

Coast; H-bridge disabled to High-Z (sleep entered after 1 ms)

Reverse (current OUT2 → OUT1)

High-Z

Forward (current OUT1 → OUT2)

Brake; low-side slow decay

The inputs can be set to static voltages for 100% duty-cycle drive, or they can be pulse-width modulated (PWM)

for variable motor speed. When using PWM, switching between driving and braking typically works best. For

example, to drive a motor forward with 50% of its max RPM, IN1 = 1 and IN2 = 0 during the driving period, and

IN1 = 1 and IN2 = 1 during the other period. Alternatively, the coast mode (IN1 = 0, IN2 = 0) for fast current

decay is also available. The input pins can be powered before VM is applied.

Reverse drive

Forward drive

Slow decay (brake)

High-Z (coast)

Slow decay (brake)

High-Z (coast)

OUT1

OUT2

OUT1

OUT2

FORWARD

REVERSE

图 4. H-Bridge Current Paths

7.3.2 Sleep Mode

When IN1 and IN2 are both low for time t_SLEEP(typically 1 ms), the DRV8872 device enters a low-power sleep

mode, where the outputs remain High-Z and the device uses I_VMSLEEP(microamps) of current. If the device is

powered up while both inputs are low, sleep mode is immediately entered. After IN1 or IN2 are high for at least 5

µs, the device is operational 50 µs (t_ON) later.

7.3.3 Current Regulation

The DRV8872 device limits the output current based on the resistance of an external sense resistor on pin ISEN,

according to 公式 1.

DRV8872

www.ti.com.cn

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

V_TRIP(V)

0.35 (V)

I_TRIP(A) =

R_ISEN(W) R_ISEN(W)

(1)

For example, if R_ISEN= 0.16 Ω, the DRV8872 device limits motor current to 2.2 A no matter how much load

torque is applied. For guidelines on selecting a sense resistor, see the Sense Resistor section.

When I_TRIPhas been reached, the device enforces slow current decay by enabling both low-side FETs, and it

does this for time t_OFF(typically 25 µs).

I_TRIP

t_BLANK

t_DRIVE

t_OFF

图 5. Current Regulation Time Periods

After t_OFFhas elapsed, the output is re-enabled according to the two inputs INx. The drive time (t_DRIVE) until

reaching another I_TRIPevent heavily depends on the VM voltage, the back-EMF of the motor, and the inductance

of the motor.

7.3.4 Dead Time

When an output changes from driving high to driving low, or driving low to driving high, dead time is automatically

inserted to prevent shoot-through. t_DEADis the time in the middle when the output is High-Z. If the output pin is

measured during t_DEAD, the voltage will depend on the direction of current. If current is leaving the pin, the

voltage is a diode drop below ground. If current is entering the pin, the voltage is a diode drop above VM. This

diode is the body diode of the high-side or low-side FET.

IN1

IN2

OUT1

t_PD

t_R

t_DEAD

t_PD

t_F

t_DEAD

OUT2

t_PD

t_F

t_DEAD

t_PD

t_R

t_DEAD

图 6. Propagation Delay Time

DRV8872

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

www.ti.com.cn

7.3.5 Protection Circuits

The DRV8872 device is fully protected against VM undervoltage, overcurrent, and overtemperature events.

When the device is in a protected state, nFAULT is driven low. When the fault condition is removed, nFAULT

becomes a high-impedance state.

7.3.5.1 VM Undervoltage Lockout (UVLO)

If at any time the voltage on the VM pin falls below the undervoltage-lockout threshold voltage, all FETs in the H-

bridge are disabled. Operation resumes when VM rises above the UVLO threshold.

7.3.5.2 Overcurrent Protection (OCP)

If the output current exceeds the OCP threshold I_OCPfor longer than t_OCP, all FETs in the H-bridge are disabled

for a duration of t_RETRY. After that, the H-bridge re-enables according to the state of the INx pins. If the

overcurrent fault is still present, the cycle repeats; otherwise normal device operation resumes.

7.3.5.3 Thermal Shutdown (TSD)

If the die temperature exceeds safe limits, all FETs in the H-bridge is disabled. After the die temperature has

fallen to a safe level, operation automatically resumes.

表 2. Protection Functionality

FAULT

CONDITION

VM < V_UVLO

I_OUT> I_OCP

T_J> 150°C

H-BRIDGE BECOMES

Disabled

NFAULT BECOMES

RECOVERY

VM > V_UVLO

VM undervoltage lockout (UVLO)

Overcurrent (OCP)

Low

Disabled

t_RETRY

Thermal shutdown (TSD)

T_J< T_SD- T _HYS

7.4 Device Functional Modes

The DRV8872 device can be used in multiple ways to drive a brushed DC motor.

7.4.1 PWM With Current Regulation

This scheme uses all of the capabilities of the device. The I_TRIPcurrent is set above the normal operating current,

and high enough to achieve an adequate spin-up time, but low enough to constrain current to a desired level.

Motor speed is controlled by the duty cycle of one of the inputs, while the other input is static. Brake and slow

decay is typically used during the off-time.

7.4.2 PWM Without Current Regulation

If current regulation is not needed, the ISEN pin should be directly connected to the PCB ground plane. This

mode provides the highest possible peak current: up to 3.6 A for a few hundred milliseconds (depending on PCB

characteristics and the ambient temperature). If current exceeds 3.6 A, the device might reach overcurrent

protection (OCP) or over-temperature shutdown (TSD). If that occurs, the device disables and protects itself for

about 3 ms (t_RETRY) and then resumes normal operation.

7.4.3 Static Inputs With Current Regulation

The IN1 and IN2 pins can be set high and low for 100% duty cycle drive, and ITRIP can be used to control the

current, speed, and torque capability of the motor.

7.4.4 VM Control

In some systems, varying VM as a means of changing motor speed is desirable. See the Motor Voltage section

for more information.

DRV8872

www.ti.com.cn

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

8 Application and Implementation

注

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

The DRV8872 device is typically used to drive one brushed DC motor.

8.2 Typical Application

GND

IN2

OUT2

ISEN

OUT1

3.3 V

0.2 Ω

BDC

DRV8872

Controller

IN1

nFAULT

PPAD

6.5 to 45 V

Power Supply

0.1 µF

47 µF

图 7. Typical Connections

8.2.1 Design Requirements

表 3 lists the design parameters.

表 3. Design Parameters

DESIGN PARAMETER

REFERENCE

V_M

EXAMPLE VALUE

Motor voltage

24 V

0.8 A

2 A

Motor RMS current

Motor startup current

Motor current trip point

Sense resistance

PWM frequency

I_RMS

I_START

I_TRIP

R_ISEN

f_PWM

2.2 A

0.16 Ω

5 kHz

8.2.2 Detailed Design Procedure

8.2.2.1 Motor Voltage

The motor voltage used depends on the ratings of the motor selected and the desired RPM. A higher voltage

spins a brushed DC motor faster with the same PWM duty cycle applied to the power FETs. A higher voltage

also increases the rate of current change through the inductive motor windings.

8.2.2.2 Drive Current

The current path is through the high-side sourcing DMOS power driver, motor winding, and low-side sinking

DMOS power driver. Power dissipation losses in one source and sink DMOS power driver are shown in 公式 2.

P_D= I²

+ R_DS(on)Sink

(

)

DS(on)Source

(2)

DRV8872

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

www.ti.com.cn

The DRV8872 device has been measured to be capable of 2-A RMS current at 25°C on standard FR-4 PCBs.

The maximum RMS current varies based on the PCB design, ambient temperature, and PWM frequency.

Typically, switching the inputs at 200 kHz compared to 20 kHz causes 20% more power loss in heat.

8.2.2.3 Sense Resistor

For optimal performance, the sense resistor must have the features that follow:

•

Surface-mount device

Low inductance

Rated for high enough power

Placed closely to the motor driver

The power dissipated by the sense resistor equals I_RMS× R. For example, if peak motor current is 3 A, RMS

motor current is 1.5 A, and a 0.2-Ω sense resistor is used, the resistor dissipates 1.5 A²× 0.2 Ω = 0.45 W. The

power quickly increases with higher current levels.

Resistors typically have a rated power within some ambient temperature range, along with a derated power curve

for high ambient temperatures. When a PCB is shared with other components generating heat, the system

designer should add margin. It is always best to measure the actual sense resistor temperature in a final system.

Because power resistors are larger and more expensive than standard resistors, multiple standard resistors can

be used in parallel, between the sense node and ground. This configuration distributes the current and heat

dissipation.

8.2.3 Application Curves

图 8. Current Ramp With a 2-Ω, 1 mH,

图 9. Current Ramp With a 2-Ω, 1 mH,

RL Load and VM = 12 V

RL Load and VM = 24 V

DRV8872

www.ti.com.cn

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

图 10. Current Ramp With a 2-Ω, 1 mH,

图 11. t_PD

RL Load and VM = 45 V

图 12. Current Regulation With R_SENSE= 0.26 Ω

图 13. OCP With 24 V and Outputs Shorted Together

DRV8872

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

www.ti.com.cn

9 Power Supply Recommendations

9.1 Bulk Capacitance

Having appropriate local bulk capacitance is an important factor in motor drive system design. More bulk

capacitance is generally beneficial but with the disadvantages of increased cost and physical size.

The amount of local capacitance needed depends on a variety of factors, including:

•

The highest current required by the motor system

The power supply’s capacitance and ability to source current

The amount of parasitic inductance between the power supply and motor system

The acceptable voltage ripple

The type of motor used (brushed DC, brushless DC, stepper)

The motor braking method

The inductance between the power supply and motor drive system limits the rate that the current can change

from the power supply. If the local bulk capacitance is too small, the system responds to excessive current

demands or dumps from the motor with a change in voltage. When adequate bulk capacitance is used, the motor

voltage remains stable and high current can be quickly supplied.

The data sheet generally provides a recommended value, but system-level testing is required to determine the

appropriate sized bulk capacitor.

Parasitic Wire

Inductance

Motor Drive System

Power Supply

VBB

Motor

Driver

GND

Local

IC Bypass

Bulk Capacitor

Capacitor

图 14. Example Setup of Motor Drive System With External Power Supply

The voltage rating for bulk capacitors should be higher than the operating voltage, to provide margin for cases

when the motor transfers energy to the supply.

DRV8872

www.ti.com.cn

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

10 Layout

10.1 Layout Guidelines

The bulk capacitor should be placed to minimize the distance of the high-current path through the motor driver

device. The connecting metal trace widths should be as wide as possible, and numerous vias should be used

when connecting PCB layers. These practices minimize inductance and allow the bulk capacitor to deliver high

current.

Small-value capacitors should be ceramic, and placed closely to device pins.

The high-current device outputs should use wide metal traces.

The device thermal pad should be soldered to the PCB top-layer ground plane. Multiple vias should be used to

connect to a large bottom-layer ground plane. The use of large metal planes and multiple vias help dissipate the

I²× R_DS(on)heat that is generated in the device.

图 15 shows the recommended layout and component placement.

10.2 Layout Example

GND

IN2

OUT2

ISEN

OUT1

IN1

nFAULT

图 15. Layout Recommendation

10.3 Thermal Considerations

The DRV8872 device has thermal shutdown (TSD) as described in the Thermal Shutdown (TSD) section. If the

die temperature exceeds approximately 175°C, the device is disabled until the temperature drops below the

temperature hysteresis level.

Any tendency of the device to enter TSD is an indication of either excessive power dissipation, insufficient

heatsinking, or too high of an ambient temperature.

10.4 Power Dissipation

Power dissipation in the DRV8872 device is dominated by the power dissipated in the output FET resistance,

R_DS(on). Use 公式 2 from the Drive Current section to calculate the estimated average power dissipation of when

driving a load.

Note that at startup, the output current is much higher than normal running current; this peak current and its

duration must be also be considered.

DRV8872

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

www.ti.com.cn

Power Dissipation (接下页)

The maximum amount of power that can be dissipated in the device is dependent on ambient temperature and

heatsinking.

注

R_DS(on)increases with temperature, so as the device heats, the power dissipation

increases. This fact must be taken into consideration when sizing the heatsink.

The power dissipation of the DRV8872 is a function of RMS motor current and the FET resistance (R_DS(ON)) of

each output.

Power ö I_RMSì High-side R_DS(ON)+ Low-side R_DS(ON)

(

)

(3)

For this example, the ambient temperature is 58°C, and the junction temperature reaches 80°C. At 58°C, the

sum of R_DS(ON)is about 0.72 Ω. With an example motor current of 0.8 A, the dissipated power in the form of heat

is 0.8 A²× 0.72 Ω = 0.46 W.

The temperature that the DRV8872 reaches depends on the thermal resistance to the air and PCB. Soldering the

device PowerPAD to the PCB ground plane, with vias to the top and bottom board layers, is important to

dissipate heat into the PCB and reduce the device temperature. In the example used here, the DRV8872 had an

effective thermal resistance R_θJAof 48°C/W, and a T_Jvalue as shown in 公式 4.

T_J= T_A+ (P_Dì R_qJA) = 58èC + (0.46 W ì 48èC/W) = 80èC

(4)

10.4.1 Heatsinking

The PowerPAD package uses an exposed pad to remove heat from the device. For proper operation, this pad

must be thermally connected to copper on the PCB to dissipate heat. On a multi-layer PCB with a ground plane,

this connection can be accomplished by adding a number of vias to connect the thermal pad to the ground plane.

On PCBs without internal planes, a copper area can be added on either side of the PCB to dissipate heat. If the

copper area is on the opposite side of the PCB from the device, thermal vias are used to transfer the heat

between top and bottom layers.

For details about how to design the PCB, refer to the TI application report, PowerPAD™ Thermally Enhanced

Package (SLMA002), and the TI application brief, PowerPAD Made Easy™ (SLMA004), available at www.ti.com.

In general, the more copper area that can be provided, the more power can be dissipated.

DRV8872

www.ti.com.cn

ZHCSE40C –AUGUST 2015–REVISED JULY 2016

11 器件和文档支持

11.1 文档支持

11.1.1 相关文档

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DRV8872DDAR产品参数

型号:	DRV8872DDAR
Brand Name：	Texas Instruments
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	TEXAS INSTRUMENTS INC
包装说明：	HSOP-8
Reach Compliance Code：	compliant
ECCN代码：	EAR99
Factory Lead Time：	12 weeks
风险等级：	0.72
Samacsys Description：	3.6A Brushed DC Motor Driver With Fault Reporting (PWM Ctrl)
模拟集成电路 - 其他类型：	BRUSH DC MOTOR CONTROLLER
JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e4
长度：	4.9 mm
湿度敏感等级：	2
功能数量：	1
端子数量：	8
最高工作温度：	125 °C
最低工作温度：	-40 °C
最大输出电流：	3.6 A
封装主体材料：	PLASTIC/EPOXY
封装代码：	HLSOP
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, HEAT SINK/SLUG, LOW PROFILE
峰值回流温度（摄氏度）：	260
座面最大高度：	1.7 mm
最大供电电流 (Isup)：	10 mA
最大供电电压 (Vsup)：	45 V
最小供电电压 (Vsup)：	6.5 V
标称供电电压 (Vsup)：	12 V
表面贴装：	YES
温度等级：	AUTOMOTIVE
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	3.9 mm
Base Number Matches：	1

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