GL850 USB 2.0 4-Port HUB Controller
CHAPTER 5 FUNCTION DESCRIPTION
5.1 General
5.1.1 USPORT Transceiver
USPORT (upstream port) transceiver is the analog circuit that supports both full-speed and high-speed
electrical characteristics defined in chapter 7 of USB specification Revision 2.0. USPORT transceiver will
operate in full-speed electrical signaling when GL850 is plugged into a 1.1 host/hub. USPORT transceiver
will operate in high-speed electrical signaling when GL850 is plugged into a 2.0 host/hub.
5.1.2 PLL (Phase Lock Loop)
Gl850 contains a 40x PLL and a 10x PLL. PLL generates the clock sources for the whole chip. The
generated clocks are proven quite accurate that help in generating high speed signal without jitter.
5.1.3 FRTIMER
This module implements hub (micro)frame timer. The (micro)frame timer is derived from the hub’s local
clock and is synchronized to the host (micro)frame period by the host generated Start of (micro)frame
(SOF). FRTIMER keeps tracking the host’s SOF such that GL850 is always safely synchronized to the host.
The functionality of FRTIMER is described in section 11.2 of USB Specification Revision 2.0.
5.1.4 μC
μC is the micro-processor unit of GL850. It is an 8-bit RISC processor with 2K ROM and 64 bytes RAM.
It operates at 6MIPS of 12Mhz clock to decode the USB command issued from host and then prepares the
data to respond to the host. In addition, μC can handle GPIO (general purpose I/O) settings and reading
content of EEPROM to support high flexibility for customers of different configurations of hub. These
configurations include self/bus power mode setting, individual/gang mode setting, downstream port number
setting, device removable/non-removable setting, and PID/VID setting.
5.1.5 UTM (USB2.0 Transceiver Macrocell Interface)
UTMI handles the low level USB protocol and signaling. It’s designed based on the Intel’s UTMI
specification 1.01. The major functions of UTMI logic are to handle the data and clock recovery, NRZI
encoding/decoding, Bit stuffing /de-stuffing, supporting USB2.0 test modes, and serial/parallel conversion.
5.1.6 USPORT logic
USPORT implements the upstream port logic defined in section 11.6 of USB specification Revision 2.0. It
mainly manipulates traffics in the upstream direction. The main functions include the state machines of
Receiver and Transmitter, interfaces between UTMI and SIE, and traffic control to/from the REPEATER
and TT.
5.1.7 SIE (Serial Interface Engine)
SIE handles the USB protocol defined in chapter 8 of USB specification Revision 2.0. It co-works with μC
to play the role of the hub kernel. The main functions of SIE include the state machine of USB protocol
flow, CRC check, PID error check, and timeout check. Unlike USB1.1, bit stuffing/de-stuffing is
implemented in UTMI, not in SIE.
5.1.8 Control/Status register
Control/Status register is the interface register between hardware and firmware. This register contains the
information necessary to control endpoint0 and endpoint1 pipelines. Through the firmware based
architecture, GL850 possesses higher flexibility to control the USB protocol easily and correctly.
©2000-2003 Genesys Logic Inc.—All rights reserved.
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