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产品型号HFC0100的概述

芯片HFC0100的概述 HFC0100是一种高性能的数字信号处理器，主要应用于通信和网络设备中。它的设计旨在满足现代数字通信技术对高速和高密度集成电路的需求，特别是在数据传输、语音处理和信号编码等领域显示出其独特的优势。HFC0100可被广泛应用于数字电视、宽带接入网、移动通信及音视频压缩等场景中，符合21世纪对高效和低功耗的严苛要求。芯片的架构基于先进的半导体工艺，具备强大的计算能力和高度的集成度。HFC0100集成了多个功能模块，包括处理核心、存储单元及多通道接口，具备较强的数据处理能力和灵活的扩展性。此外，该芯片可通过多种总线接口与其他设备进行通信，充分满足多样化的应用需求。芯片HFC0100的详细参数 HFC0100的详细技术参数包括以下几方面： - 工作电压：3.3V – 5V - 工作温度范围：0°C – 70°C - 最大时钟频率：主频可达到200 MHz - 核心...

产品型号HFC0100的Datasheet PDF文件预览

HFC0100

QUASI RESONANT CONTROLLER

The Future of Analog IC Technology

DESCRIPTION

FEATURES

•

Universal Main Input Voltage (85~265VAC)

Quasi-Resonant Operation

The HFC0100 is a peak current mode controller

with Green Mode Operation. Its high efficiency

feature over the entire line and load range

meets the stringent world-wide energy

efficiency requirements.

Valley Switching for high efficiency and EMI

Active Burst Mode for low standby power

consumption

•

Internal High Voltage Current Source

High level of integration, allows a very low

number external component count

Maximum Frequency Limited

Internal Soft Start

Internal 250nS Leading Edge Blanking

Thermal shutdown (auto restart with

hysteresis)

The HFC0100 integrated with a high voltage

current source, its valley detector ensures

minimum Drain-Source voltage switching

(Quasi-Resonant operation). When the output

power falls below a given level, the controller

enters the burst mode.

•

The HFC0100 features variable protections like

Thermal Shutdown (TSD), Vcc Under voltage

Lockout (UVLO), Over Load Protection (OLP),

Over Voltage Protection (OVP).

•

Vcc Under Voltage Lockout with Hysteresis

(UVLO)

Over Voltage Protection

•

The HFC0100 is available in the 8-pin SOIC8

package.

Over Load Protection.

APPLICATIONS

•

Battery charger: cellular phone, digital

camera, video camera, electrical shaver,

emergency lighting system, etc

Standby power supply: CRT-TV, Projection-

TV, LCD-TV, PDP-TV, Desk top PC, Audio

system, etc

SMPS: Inc jet printer, DVD player/recorder,

VCR, CD player, Set top box, Air

conditioner, refrigerator, washing machine,

dish washer, Adapter for NB, etc

For MPS green status, please visit MPS website under Quality Assurance.

“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of

Monolithic Power Systems, Inc.

HFC0100 Rev. 1.01

9/23/2011

www.MonolithicPower.com

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HFC0100—QUASI RESONANT CONTROLLER

TYPICAL APPLICATION

RTN

Drive

N/C

GND

VCC

8 _FB

VSD

HFC0100 Rev. 1.01

www.MonolithicPower.com

9/23/2011

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HFC0100—QUASI RESONANT CONTROLLER

ORDERING INFORMATION

Part Number*

Package

Top Marking

Free Air Temperature (T_A)

SOIC8

HFC0100HS

HFC100

-40°C to +125°C

*For Tape & Reel, add suffix –Z (e.g. HFC0100HS–Z);

For RoHS compliant packaging, add suffix –LF (e.g. HFC0100HS–LF–Z)

PACKAGE REFERENCE

TOP VIEW

VSD

VCC

GND

Drive

ABSOLUTE MAXIMUM RATINGS ⁽¹⁾

HV Break Down Voltage.............. -0.7V to 700V

Vcc, DRV to GND ...........................-0.3V to 22V

FB, CS, VSD to GND........................-0.3V to 7V

Recommended Operation Conditions ⁽³⁾

Operating Vcc range...........................8V to 20V

Maximum Junction Temp. (T_J) ............. +125°C

Thermal Resistance ⁽⁴⁾

θ_JA

θ_JC

(2)

Continuous Power Dissipation…(T_A= +25°C)

SOIC8 .....................................96 ...... 45...°C/W

………………………………………………....1.3W

Junction Temperature...............................150°C

Thermal Shut Down..................................150°C

Thermal Shut Down Hysteresis ..................50°C

Notes:

1) Exceeding these ratings may damage the device.

2) The maximum allowable power dissipation is a function of the

maximum junction temperature T_J(MAX), the junction-to-

ambient thermal resistance θ_JA, and the ambient temperature

T_A. The maximum allowable continuous power dissipation at

any ambient temperature is calculated by P_D(MAX) = (T_J

(MAX)-T_A)/θ_JA. Exceeding the maximum allowable power

dissipation will cause excessive die temperature, and the

regulator will go into thermal shutdown. Internal thermal

shutdown circuitry protects the device from permanent

damage.

Lead Temperature ....................................260°C

Storage Temperature .............. -60°C to +150°C

ESD Capability Human Body Model (All Pins

except HV) ............................................... 2.0kV

ESD Capability Machine Model ................. 200V

3) The device is not guaranteed to function outside of its

operating conditions.

4) Measured on JESD51-7, 4-layer PCB.

HFC0100 Rev. 1.01

9/23/2011

www.MonolithicPower.com

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HFC0100—QUASI RESONANT CONTROLLER

ELECTRICAL CHARACTERICS

For typical value T_J=25℃

Parameter

Start-up Current Source (Pin HV)

Charging current from Pin HV

Symbol Conditions

Min

1.4

Typ

Max

2.6

Unit

μA

I_charge

I_leak

Vcc=6V;V_HV=400V

With auxiliary

supply; V_HV=400V,

Vcc=13V

Leakage current from Pin HV

Break Down Voltage

V_BR

700

Supply Voltage Management (Pin Vcc)

Vcc Upper Level at which the Internal

High Voltage Current Source Stops

Vcc Lower Level at which the Internal

High Voltage Current Source Triggers

Vcc Re-charge Level at which the

protection occurs

Internal IC Consumption, 1nF Load on

Drive Pin,

Internal IC Consumption, Latch off

phase,

V_CCH

V_CCL

Vccp

Icc1

Icc2

10.6

7.2

11.8

8.8

5.5

2.0

450

Fs=100kHz,

Vcc=12V

μA

VCC=6V

Feedback Management (Pin FB)

Internal Pull Up Resistor

Internal Pull Up Voltage

FB Pin to Current Limit Division Ratio

Internal Soft-Start Time

R_FB

Vup

I_div

4.5

kΩ

Tss

2.4

FB Decreasing Level at which the

controller enter the Burst Mode

FB Increasing Level at which the

controller leave the Burst Mode

Over Load Set Point

V_BURL

0.5

V_BURH

V_OLP

0.7

3.7

Valley Switching Management (Pin VSD)

Valley Switching Threshold Voltage

Valley Switching Hysteresis

V_VSD

V_hys

High

Ipin2=3.0mA

Low State;

Ipin2=-2.0mA

Pull down from 2V

to -100mV

State;

V_VSDH

V_VSDL

7.5

Pin VSD Clamp Voltage

-0.8

-0.65

-0.5

Valley Switching Propagation Delay

T_VSD

T_min

120

6.6

160

7.8

4.6

200

μS

Minimum Off Time

Re-start time After Last Valley detect

Transition

T_restart

OVP Sampling Delay

Pin VSD OVP reference level

Internal Impedance

T_OVPS

V_OVP

Rint

3.5

μS

kΩ

Current Sampling Management (Pin CS)

Leading Edge Blanking

Driving Signal (Pin DRIVE)

Sourcing Resistor

T_LEB

250

R_H

R_L

Ω

Sinking Resistor

HFC0100 Rev. 1.01

www.MonolithicPower.com

9/23/2011

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HFC0100—QUASI RESONANT CONTROLLER

PIN FUNCTIONS

Pin #

Name

Description

Input from the auxiliary flyback signal, it ensures discontinuous operation and valley

switching. It also offers a fixed OVP detection.

VSD

Supply voltage Pin. This pin is connected to an external bulk capacitor of typically 22uf and a

ceramic capacitor of typically 0.1uF.

Vcc

N/C

This Pin ensures adequate creepage distance.

Input for the start up current unit.

Output of the driving signal.

Input of the current sense.

Ground.

Drive

GND

The Pin sets the peak current limit, by connecting an optocoupler to this Pin. A feedback

voltage of 3.7V will trigger an over load protection, and a feedback voltage of 0.5V will trigger

a burst mode operation.

HFC0100 Rev. 1.01

9/23/2011

www.MonolithicPower.com

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HFC0100—QUASI RESONANT CONTROLLER

TYPICAL PERFORMANCE CHARACTERISTICS

T_A=25℃

Charging Current From Pin

HV (Vcc=6V, VHV=400V) Vs

Temperature

IC Consumption Vs

Vcc (No Output Load)

IC Consumption Vs

Vcc (1nF Output Load)

2.5

1100

1000

900

800

700

600

500

400

3400

3000

2600

2200

1800

1400

1000

F =100kHz

F =60kHz

1.5

F =60kHz

-40 -20

25 50 85 105 125

10 11 12 13 14 15 16 17 18

(V)

10 11 12 13 14 15 16 17 18

(V)

TEMPERATURE ( C)

Pin FB Internal Pull Up

Resistor Vs Temperature

Vcc Upper Level at which

the Internal High Voltage

Current Source Stops Vs

Temperature

Vcc Lower Level at which

the Internal High Voltage

Current Source Triggers Vs

Temperature

8.5

8.3

8.1

7.9

7.7

7.5

11.8

11.6

11.4

11.2

-40 -20

25 50 85 105 125

-40 -20

25 50 85 105 125

TEMPERATURE ( C)

-40 -20

25 50 85 105 125

TEMPERATURE ( C)

Over Load Set Point

Vs Temperature

Minimum Off Time

Vs Temperature

Valley Switching Threshold

Voltage Vs Temperature

3.8

3.6

3.4

8.5

7.5

-40 -20

25 50 85 105 125

-40 -20

25 50 85 105 125

-40 -20

25 50 85 105 125

TEMPERATURE (^OC)

HFC0100 Rev. 1.01

9/23/2011

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HFC0100—QUASI RESONANT CONTROLLER

TYPICAL PERFORMANCE CHARACTERISTICS (continues)

T_A=25℃

OVP Sampling Delay

Vs Temperature

Pin VSD OVP reference level

Vs Temperature

Pin VSD Internal Impedance

Vs Temperature

6.2

6.1

3.8

3.6

3.4

3.2

5.9

5.8

-40 -20

25 50 85 105 125

-40 -20

25 50 85 105 125

-40 -20

25 50 85 105 125

TEMPERATURE (^OC)

FB Decreasing Level

at which the controller

enter the Burst Mode

Vs Temperature

Sourcing Resistor

Vs Temperature

Sinking Resistor

Vs Temperature

600

550

500

450

400

-40 -20

25 50 85 105 125

-40 -20

25 50 85 105 125

-40 -20

25 50 85 105 125

TEMPERATURE (^OC)

FB Increasing Level

at which the controller

leave the Burst Mode

Vs Temperature

800

750

700

650

600

-40 -20

25 50 85 105 125

TEMPERATURE (^OC)

HFC0100 Rev. 1.01

9/23/2011

www.MonolithicPower.com

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HFC0100—QUASI RESONANT CONTROLLER

BLOCK DIAGRAME

Power

Management

Vcc(2)

HV(4)

Start Up

Unit

Driving

Sig

Managment

Valley

Detector

VSD(1)

Drive(5)

nal

Peak

Current

Limitation

Protection

N.C.(3)

GND(7)

CS(6)

nit

Burst Mode

Control

FB(8)

Figure 1— Block Diagram

HFC0100 Rev. 1.01

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HFC0100—QUASI RESONANT CONTROLLER

OPERATION

The HFC0100 incorporates all the necessary

features needed to a reliable Switch Mode Power

Supply. Its valley detector ensures minimum

Drain-Source voltage switching (Quasi-Resonant

operation). When the output power falls below a

given level, the regulator enters the burst mode.

An internal minimum off time limiter prevents the

free running frequency to exceed 150kHz.

Start-Up

Figure 2—Valley Detector

Initially, the IC is self supplying from the internal

high voltage current source unit which drawn

from the HV pin.

The IC starts switching and the internal high

voltage current source unit is stopped as soon as

the voltage on Pin Vcc reaches the threshold

V_CCH—11.8V.

Before the supply is taken over by the auxiliary

winding of the transformer, the Vcc capacitor

supplies HFC0100 to maintain Vcc.

100V/div

Valley Switching

Quasi-Resonant Operation

4us/div

The HFC0100 operates in Discontinuous

Conduction Mode (DCM). The valley detector

Figure 3—Valley Switching

ensures

minimum

Drain-Source

voltage

To ensure the switching frequency below the

EN55022 start limit---150kHz, HFC0100 employs

an internal minimum off time limiter---7.8μS,

shows as figure 4.

switching (Quasi-Resonant operation)

As a result, there are virtually no primary switch

turn on losses and no secondary diode recovery

losses. It ensures the reduction of the EMI noise.

Figure2 shows the valley detector unit.

When the voltage:

N_aux

24kΩ

(V_DS− V )x

< 55mV

N_pri24kΩ + R_VSD

V_DS—Drain Source Voltage of the primary FET

V_IN—Input Voltage

100V/div

T_off≥7.8uS

N_aux—Auxiliary Winding Turns of the transformer

N_pri—Primary Winding Turns of the transformer

2us/div

Figure 4—Minimum Off Time Limit

The valley detector sends out a valley signal to

turn on the primary FET.

Figure3 shows a typical drain source voltage

waveform with valley switching.

HFC0100 Rev. 1.01

9/23/2011

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HFC0100—QUASI RESONANT CONTROLLER

V_CCUnder-Voltage Lock-out

When the Vcc below the UVLO threshold-8V, the

HFC0100 stops switching and the internal high

voltage current source unit re-starts, the Vcc

external bulk capacitor is re-charged by it.

Figure 5 shows the typical waveform with Vcc

under voltage lock out.

The auxiliary

winding take over

Figure 6—OVP Sample Unit

V_CCH=11.8V

V_CC

To avoid the mis-trigger due to the oscillation of

the leakage inductance and the parasitic

capacitance, the OVP sampling has a T_OVPS

blanking, typical 3.5μS, shows as Figure 7.

V_CCL=8V

Internal

Current

Source

V_VSD

OFF

Sampling Here

Driving

Signal

Figure 5—Vcc Under-Voltage Lock Out

Over-Voltage Protection (OVP)

T_OVPS

The positive plateau of auxiliary winding voltage

is proportional to the output voltage, the OVP use

the auxiliary winding voltage instead of directly

monitoring the output voltage.

Figure 7

Over Load Protection (OLP)

The maximum output power is limited by the

maximum switching frequency and maximum

primary peak current. If the output consumes

more than the maximum output power, the output

voltage is drawn below the set point, this reduces

the current through the optocoupler LED, which

also reduces the transistor current, thus

increases the FB voltage.

The Figure 6 shows the OVP sample unit.

If the voltage:

N_aux

24kΩ

V_O×

> 6V

N_SEC24kΩ +R_VSD

V_O—Output voltage

N_aux—Auxiliary Winding Turns of the transformer

By continuously monitoring the Pin FB voltage,

when the feedback voltage exceeds the

threshold V_OLP—3.7V, it shuts off the switching

cycle. The HFC0100 enters a safe low power

operation that prevents from any lethal thermal or

stress damage. As soon as the default

disappears, the power supply resumes operation.

N_SEC—Secondary Winding Turns of the

transformer

The OVP circuit is triggered, and the HFC0100

stops the switching cycle and goes into latched

fault condition. The controller stays fully latched

in this position until the Vcc is decreased down to

3V, e.g. when the user unplugs the power supply

from the main supply and re-plugs it.

During the start up or load transient, the FB

voltage will be high enough temporarily to mis-

trigger the OLP, to prevent this undesired

protection, OLP circuit is designed to be triggered

after Vcc is decreased below 8.5V.

HFC0100 Rev. 1.01

9/23/2011

www.MonolithicPower.com

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HFC0100—QUASI RESONANT CONTROLLER

Burst Operation

Current Limit Setting

To minimize the power dissipation in no load or

light load, the HFC0100 enters the burst mode

operation. As the load decreases, the FB voltage

decreases,, the HFC0100 stops the switching

cycle when the FB voltage drops below the

threshold V_BURL—0.5V. And the output voltage

starts to drop at a rate dependent on the load.

This causes the FB voltage to rise again. Once

The switch current is sensed by the resistor

series between the Source of the FET and the

ground. And the current limit is determined by the

V_FBV_FB

FB signal, V_Limit

. To limit the

I_div

maximum output power, the current limit is

clamped at 1V when V_FBis bigger than 3.3V.

Leading Edge Blanking

the FB voltage exceeds the threshold V_BURH

—

0.7V, switching resumes. The FB voltage then

falls and rises repeatedly. The burst mode

operation alternately enables and disables

switching cycle of the MOSFET thereby reducing

switching loss in the no load or light load

conditions.

In order to avoid the premature termination of the

switching pulse due to the parasitic capacitance,

an internal leading edge blanking (LEB) unit is

employed between the CS Pin and the current

comparator input. During the blanking time, the

path, CS Pin to the current comparator input, is

blocked. Figure 9 shows the leading edge

blanking.

Figure 8 shows the typical FB and Drive

waveform during the burst mode.

V_BURH:0.7V

V_Limit

V_BURL:0.5V

T_LEB=250nS

200mV/div

Drive

5V/div

40us/div

Figure 8—Burst Mode

Thermal Shutdown (TSD)

To prevents from any lethal thermal damage. The

HFC0100 shuts down switching cycle when the

inner temperature exceeds 150DegC. As soon as

the inner temperature drops below 100DegC, the

power supply resumes operation.

Figure 9—Leading Edge Blanking

Over Power Compensation

In the case of current sensing, shows as figure

10, the turn off of the FET is delayed due to the

propagation delay of the control circuit, the delay

time is the inherent characteristic of the control

circuit, so T_delaycan be seen fixed. This delay will

cause an overshoot of the peak current. △I2 is

bigger than △I1 due to the bigger rising ratio(the

higher input voltage, the bigger rising ratio).

Soft-Start

To reduce the stress on primary MOSFET and

secondary diode during start up, to smoothly

establish the output voltage, the HFC0100 has

an internal soft-start circuit that increases the

current comparator inverting input voltage,

together with the MOSFET current, slowly after it

starts up. The pulse width to the power switching

device is progressively increased to establish the

correct working conditions for transformers,

inductors, and capacitors.

HFC0100 Rev. 1.01

9/23/2011

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HFC0100—QUASI RESONANT CONTROLLER

The propagation delay is done by means of the

feedforward resistor, shown as Figure 11.

Through this method, adding one offset voltage

at CS pin (the higher input voltage, the bigger

offset voltage.).

I_Limit

Limit2

I_Limit1

I_Limit

△I2

△I1

T_delay

T_delayT_delay

Figure 10—Propagation delay of the current

limit

V_bulk

R_feedforward

HFC0100

Current Comparator

R_sense

V_ref

Figure 11—Over Power Compensation

Figure 12 shows the HFC0100 control flow chart.

Figure 13 shows the HFC0100 evolution of the

signals in presence of faults

HFC0100 Rev. 1.01

9/23/2011

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HFC0100—QUASI RESONANT CONTROLLER

Start

Internal High Voltage

Current Source ON

Vcc Decrease

to 5.5V

Vcc<3V?

Shut off the

Switching Pulse

Latch off the

Switching Pulse

Shut Down

Internal High Voltage

Current Source

Vcc>11.8V

OTP=

Logic

High?

Vcc<8V

OVP=

Logic

High?

Soft Start

Thermal

Monitor

Monitor Vcc

Pin VSD

Monitor

Monitor VFB

Vcc<8.5V?

and

OLP=Logic

High

VFB<0.5V

0.5V<VFB<3.7V

VFB>3.7V

Continuous

Fault Monitor

Burst Mode

Operation

QR mode Operation

OLP=Logic High

Toff<7.8uS

UVLO, OTP & OLP are auto restart, OVP

is latch

VFB>0.7V

Release from the latch condition, need to

unplug from the main input .

Constraint

Toff_min≥7.8uS

Figure 12—Control Flow Chart

HFC0100 Rev. 1.01

9/23/2011

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HFC0100—QUASI RESONANT CONTROLLER

Unplug from

main input

Regulation

Occurs Here

Vcc

Start up

Over Voltage

Occurs Here

Normal

operation

Normal

operation

Normal

operation

11.8V

8.5V

5.5V

Driver

Pluses

Driver

High voltage

current source

Off

IFault Flag

OLP Fault

Occurs Here

Normal operation

OTP Fault

Occurs Here

OVP Fault

Occurs Here

Normal operation

Figure 13—Evolution of the Signals in Presence of Faults

HFC0100 Rev. 1.01

9/23/2011

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HFC0100—QUASI RESONANT CONTROLLER

PACKAGE INFORMATION

SOIC8

0.189(4.80)

0.197(5.00)

0.050(1.27)

0.024(0.61)

0.063(1.60)

0.150(3.80)

0.157(4.00)

0.228(5.80)

0.244(6.20)

0.213(5.40)

PIN 1 ID

TOP VIEW

RECOMMENDED LAND PATTERN

0.053(1.35)

0.069(1.75)

SEATING PLANE

0.004(0.10)

0.010(0.25)

0.0075(0.19)

0.0098(0.25)

0.013(0.33)

0.020(0.51)

SEE DETAIL "A"

0.050(1.27)

BSC

SIDE VIEW

FRONT VIEW

0.010(0.25)

0.020(0.50)

x 45^o

NOTE:

1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN

BRACKET IS IN MILLIMETERS.

GAUGE PLANE

0.010(0.25) BSC

2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,

PROTRUSIONS OR GATE BURRS.

3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH

OR PROTRUSIONS.

4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)

SHALL BE 0.004" INCHES MAX.

0.016(0.41)

0.050(1.27)

0^o-8^o

5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA.

6) DRAWING IS NOT TO SCALE.

DETAIL "A"

NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third

party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not

assume any legal responsibility for any said applications.

HFC0100 Rev. 1.01

9/23/2011

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首天国际（深圳）科技有限公司服务专线: 0755-82807802/82807803 在线联系:

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柒号芯城电子商务（深圳）有限公司服务专线: 18922803401 在线联系:

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北京元坤伟业科技有限公司服务专线: 010-62104931621064316210489162104791 在线联系:

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HFC0100HS产品参数

型号:	HFC0100HS
是否无铅：	含铅
是否Rohs认证：	不符合
生命周期：	Active
零件包装代码：	SOIC
包装说明：	SOIC-8
针数：	8
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	5.22
模拟集成电路 - 其他类型：	SWITCHING CONTROLLER
控制模式：	CURRENT-MODE
控制技术：	RESONANT CONTROL
最大输入电压：	20 V
最小输入电压：	8 V
标称输入电压：	12 V
JESD-30 代码：	R-PDSO-G8
长度：	4.9 mm
功能数量：	1
端子数量：	8
最高工作温度：	125 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	NOT SPECIFIED
座面最大高度：	1.75 mm
表面贴装：	YES
切换器配置：	SINGLE
最大切换频率：	100 kHz
温度等级：	AUTOMOTIVE
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	3.9 mm
Base Number Matches：	1

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