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DDC101U 参数 Datasheet PDF下载

DDC101U图片预览
型号: DDC101U
PDF下载: 下载PDF文件 查看货源
内容描述: 模拟 - 数字转换器, 20位\n [Analog-to-Digital Converter, 20-Bit ]
分类和应用: 转换器光电二极管
文件页数/大小: 28 页 / 238 K
品牌: ETC [ ETC ]
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®
DDC
101
DDC101
20-BIT ANALOG-TO-DIGITAL CONVERTER
FEATURES
q
MONOLITHIC CHARGE INPUT ADC
q
DIGITAL FILTER NOISE REDUCTION:
0.9ppm, rms
q
DIGITAL ERROR CORRECTION: CDS
q
CONVERSION RATE: Up to 15kHz
q
USER FRIENDLY EVALUATION FIXTURE
APPLICATIONS
q
DIRECT PHOTOSENSOR DIGITIZATION
q
PRECISION INSTRUMENTATION
q
INFRARED PYROMETRY
q
PRECISION PROCESS CONTROL
q
CT SCANNER DAS
q
CHEMICAL ANALYZERS
DESCRIPTION
The DDC101 is a precision, wide dynamic range, charge
digitizing A/D converter with 20-bit resolution. Low
level current output devices, such as photosensors, can be
directly connected to its input. The most stringent accu-
racy requirements of many unipolar output sensor appli-
cations occur at low signal levels. To meet this require-
ment, Burr-Brown developed the adaptive delta modula-
tion architecture of the DDC101 to provide linearly
improving noise and linearity errors as the input signal
level decreases. The DDC101 combines the functions of
current-to-voltage conversion, integration, input program-
mable gain amplification, A/D conversion, and digital
filtering to produce precision, wide dynamic range re-
sults. The input signal can be a low level current con-
nected directly into the unit or a voltage connected
through a user selected resistor. Although the DDC101 is
optimized for unipolar signals, it can also accurately
digitize bipolar input signals. The patented delta modula-
Test In
+V
S
tion topology combines charge integration and digitiza-
tion functions. Oversampling and digital filtering reduce
system noise dramatically. Correlated Double Sampling
(CDS) captures and eliminates steady state and conver-
sion cycle dependent offset and switching errors that are
not eliminated with conventional analog circuits.
The DDC101 block diagram is shown below. During
conversion, the input signal is collected on the internal
integration capacitance for a user determined integration
period. A high precision, autozeroed comparator samples
the analog input node. Tracking logic updates the internal
high resolution D/A converter at a 2MHz rate to maintain
the analog input at virtual ground. A user programmable
digital filter oversamples the tracking logic’s output. The
digital filter passes a low noise, high resolution digital
output to the serial I/O register. The serial outputs of
multiple DDC101 units can be easily connected together
in series or parallel if desired to minimize interconnections.
DDC101 Integrated Circuit
Test Current
Reset
CDAC
C
INT
DAC
18 Bits
Analog
Input
Ground
Comparator
Digital Integration,
Tracking and
Control Logic
Digital Filter and
Error Correction
Oversampled
Digital Out
20 Bits
Serial I/O
Register
Serial In
Serial Out
V
REF
Setup
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©
1993 Burr-Brown Corporation
PDS-1211E
Printed in U.S.A. March, 1998
SBAS029