Fa il-S a fe , Hig h -S p e e d (1 0 Mb p s ),
S le w -Ra t e -Lim it e d RS -4 8 5 /RS -4 2 2 Tra n s c e ive rs
–MAX3089
Y
1k
TEST POINT
R
R
RECEIVER
OUTPUT
V
CC
S1
S2
C
RL
V
OD
1k
15pF
V
OC
Z
Figure 5. Driver DC Test Load
Figure 6. Receiver Enable/Disable Timing Test Load
TXP and RXP low, connect them to ground, or leave
them unconnected (internal pull-down). To invert the
Fa il-S a fe
The MAX3080 family guarantees a logic-high receiver
output when the receiver inputs are shorted or open, or
when they are connected to a terminated transmission
line with all drivers disabled. This is done by setting the
receiver threshold between -50mV and -200mV. If the
differential receiver input voltage (A-B) is greater than
or equal to -50mV, RO is logic high. If A-B is less than
or equal to -200mV, RO is logic low. In the case of a
te rmina te d b us with a ll tra ns mitte rs d is a b le d , the
receiver’s differential input voltage is pulled to 0V by
the termination. With the receiver thresholds of the
MAX3080 family, this results in a logic high with a 50mV
minimum nois e ma rg in. Unlike p re vious fa il-s a fe
devices, the -50mV to -200mV threshold complies with
the ±200mV EIA/TIA-485 standard.
driver phase, drive TXP high or connect it to V . To
CC
invert the receiver phase, drive RXP high or connect it
to V . Note that the receiver threshold is positive
CC
when RXP is high.
The MAX3089 can operate in full- or half-duplex mode.
Drive the H/F pin low, leave it unconnected (internal
pull-down), or connect it to GND for full-duplex opera-
tion, and drive it high for half-duplex operation. In full-
duplex mode, the pin configuration of the driver and
receiver is the same as that of a MAX3080 (Figure 4). In
half-duplex mode, the receiver inputs are switched to
the driver outputs, connecting outputs Y and Z to inputs
A and B, respectively. In half-duplex mode, the internal
full-duplex receiver input resistors are still connected to
pins 11 and 12.
MAX3 0 8 9 P ro g ra m m in g
The MAX3089 has several programmable operating
modes. Transmitter rise and fall times are programma-
ble between 2500ns, 750ns, and 25ns, resulting in
ma ximum d a ta ra te s of 115kb p s , 500kb p s , a nd
10Mbps, respectively. To select the desired data rate,
drive SRL to one of three possible states by using a
Ap p lic a t io n s In fo rm a t io n
2 5 6 Tra n s c e ive rs o n t h e Bu s
The standard RS-485 receiver input impedance is 12kΩ
(one-unit load), and the standard driver can drive up to
32 unit loads. The MAX3080 family of transceivers have
a 1/8-unit-load receiver input impedance (96kΩ), allow-
ing up to 256 transceivers to be connected in parallel
on one communication line. Any combination of these
devices and/or other RS-485 transceivers with a total of
32 unit loads or less can be connected to the line.
three-state driver, by connecting it to V
or GND, or
CC
by leaving it unconnected. For 115kbps operation, set
the thre e -s ta te d e vic e in hig h-imp e d a nc e mod e or
leave SRL unconnected. For 500kbps operation, drive
SRL high or connect it to V . For 10Mbps operation,
CC
d rive SRL low or c onne c t it to GND. SRL c a n b e
changed during operation without interrupting data
communications.
Re d u c e d EMI a n d Re fle c t io n s
The MAX3080–MAX3085, and MAX3089 with SRL = V
CC
or unconnected, are slew-rate limited, minimizing EMI
and reducing reflections caused by improperly termi-
nated cables. Figure 14 shows the driver output wave-
form a nd its Fourie r a na lys is of a 20kHz s ig na l
transmitted by a MAX3086/MAX3087/MAX3088, and
MAX3089 with SRL = GND. High-frequency harmonic
Occasionally, twisted-pair lines are connected back-
ward from normal orientation. The MAX3089 has two
pins that invert the phase of the driver and the receiver
to correct for this problem. For normal operation, drive
______________________________________________________________________________________ 15