Freescale Semiconductor, Inc.
Table 1. Class B Bus Capacitance and Resistance Expressions
Level
Minimum
Maximum
Capacitance
Resistance to Ground
(3.3 x 0.9) + (0.47 x 0.9) = 3.39 nF
(3.3 x 1.1) + 25(0.47 x 1.1) = 16.55 nF
(1.5 x 0.95) || (10.6 x 0.95) / 25 = 314 Ω
(1.5 x 1.05) || (10.6 x 1.05) = 1.38 kΩ
APPLICATIONS
the assembly, the bus transmitter's output stage will be disabled
and the leakage current from the BUS output will not source or
sink more than 100 µA of current. The transceiver will operate
with a remote ground offset of ±2.0 V, but the lower corners of
transmission will not be rounded during this condition.
Class B Module Inputs
Transmitter Data from the MCU (Tx)
The Tx input is a push-pull (N-channel/P-channel FETs)
buffer with hysteresis for noise immunity purposes. This pin is a
5.0 V CMOS logic level input from the MCU following a true
logic protocol. A logic [0] input drives the BUS output to 0 V (via
the external pull-down resistor to ground on each node), while
a logic [1] input produces a high voltage at the BUS output. A
logic [0] input level is guaranteed when the Tx input pin is open-
circuited by virtue of an internal 40 kΩ pull-down resistor. No
external resistor is required for its operation.
Receiver Output to the Microcontroller (Rx)
This is a 5.0 V CMOS compatible push-pull output used to
send received data to the microcontroller. It does not require an
external pull-up resistor to be used. The receiver is always
enabled and draws less than 65 µA of current from VBAT. The
receive threshold is dependent on the state of the SLEEP pin.
The receiver circuitry is able to operate with VBAT voltages as
low as 4.25 V and still remains capable of “waking up” the
33990 when remote Class B activity is detected.
Waveshaping and 4X/Loop
This input is a tristateable input: 0 V = normal waveshaping,
5.0 V = waveshaping is disabled for 4X transmitting, and high
impedance = loopback mode of operation. This is a logic level
input used to select whether waveshaping for the Class B
output is enabled or disabled. A logic [0] enables waveshaping,
while a logic [1] disables waveshaping. In the 4X mode, the
BUS output rise time is less than 2.0 µs and the fall time is less
than 5.0 µs (owing to the external RC pull-down to ground). In
the loopback condition, the Tx signal is fed back to the Rx
output after waveshaping without being transmitted onto the
BUS. This mode of operation is useful for system diagnostic
purposes.
When the SLEEP pin is 0 V and message activity occurs on
the bus, the receiver passes the bus message through to the
microcontroller. The 33990 does not automatically “wake up”
from a sleep state when bus activity occurs: the microcontroller
must tell it to do so.
In the Static Electrical Characteristics table, the maximum
voltage for Rx is specified as 4.75 V over an operating range of
-40°C to 125°C temperature and 7.0 V to 16 V VBAT. This
maximum Rx voltage is compatible with the minimum VDD
voltage of microcontrollers to prevent the 33990 from sourcing
current to the microcontroller's output.
Class B Module Outputs
Transceiver Output (BUS)
Switched Ground Output (LOAD)
Normally this output is a saturated switch to ground, which
pulls down the external resistor between the BUS and LOAD
outputs. In the event ground is lost to the assembly, the LOAD
output will bias itself “off” and will not leak more than 100 µA of
current out of this pin.
This is the output driver stage that sources current to the bus.
Its output follows the waveshaped waveform input. Its output
voltage is limited to 6.25 V to 8.0 V under normal battery level
conditions. The limited level is controlled by an internal
regulator/clamp circuit. Once the battery voltage drops below
9.0 V, the regulator/clamp circuit saturates, causing the bus
voltage to track the battery voltage. A 1.5 kΩ ±5% external
resistor (as well as any 10.6 kΩ pull-down resistors of any
secondary nodes) sinks the current to discharge the capacitors
during high-to-low transitions. This sourcing output is short
circuit-protected (60 mA to 170 mA) against a short to -2.0 V
and sinks less than 1.0 mA when shorted to VBAT. If a short
Overtemperature Shutdown
If the BUS output becomes shorted to ground for any
duration, an overtemperature shutdown circuit “latches off” the
output source transistor whenever the die temperature exceeds
150°C to 190°C. The output transistor remains latched off until
the Tx input is toggled from a logic [0] to a logic [1]. The rising
edge provides the clearing function, provided the locally sensed
temperature is 10°C to 15°C below the latch-off temperature trip
temperature.
occurs, the overtemperature shutdown circuit protects the
source driver of the device. In the event battery power is lost to
33990
MOTOROLA ANALOG INTEGRATED CIRFCoUIrTMDEoVrICeEIDnAfToArmation On This Product,
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