XC6VHX565T-2FF1923C*****逻辑计算芯片
日期:2019-7-12Summary of Virtex-6 FPGA Features
0 Three sub-families:
0 Virtex-6 LXT FPGAs: High-performance logic with advanced serial connectivity
0 Virtex-6 SXT FPGAs: Highest signal processing capability with advanced serial connectivity
0 Virtex-6 HXT FPGAs: Highest bandwidth serial connectivity
0 Compatibility across sub-families
0 LXT and SXT devices are footprint compatible in the same package
0 Advanced, high-performance FPGA Logic
0 Real 6-input look-up table (LUT) technology
0 Dual LUT5 (5-input LUT) option
0 LUT/dual flip-flop pair for applications requiring rich register mix
0 Improved routing efficiency
0 64-bit (or two 32-bit) distributed LUT RAM option per 6-input LUT
0 SRL32/dual SRL16 with registered outputs option
0 Powerful mixed-mode clock managers (MMCM)
0 MMCM blocks provide zero-delay buffering, frequency synthesis, clock-phase shifting, input-jitter filtering, and phase-matched clock division
0 36-Kb block RAM/FIFOs
0 Dual-port RAM blocks
0 Programmable
0 Dual-port widths up to 36 bits
0 Simple dual-port widths up to 72 bits
0 Enhanced programmable FIFO logic
0 Built-in optional error-correction circuitry
0 Optionally use each block as two independent 18 Kb blocks
0 High-performance parallel SelectIO™ technology
0 1.2 to 2.5V I/O operation
0 Source-synchronous interfacing using ChipSync™ technology
0 Digitally controlled impedance (DCI) active termination
0 Flexible fine-grained I/O banking