TMS320C6457CCMHA 原装进口 价优 0755-88266573

High-Performance Fixed-Point DSP (C6457)

1.18-ns, 1-ns, and 0.83-ns Instruction Cycle Time/li>

850-MHz, 1-GHz, and 1.2-GHz Clock Rate

Eight 32-Bit Instructions/Cycle

8000 and 9600 MIPS/MMACS (16-Bits)

Case Temperature

Commercial:

0°C to 100°C (850 MHz)

0°C to 100°C (1 GHz)

0°C to 95°C (1.2 GHz)

Extended:

-40°C to 100°C (1 GHz)

-40°C to 95°C (1.2 GHz)

TMS320C64x+™ DSP Core

Dedicated SPLOOP Instruction

Compact Instructions (16-Bit)

Instruction Set Enhancements

TMS320C64x+ Megamodule L1/L2 Memory Architecture:

256K-Bit (32K-Byte) L1P Program Cache [Direct Mapped]

256K-Bit (32K-Byte) L1D Data Cache [2-Way Set-Associative]

16M-Bit (2048K-Byte) L2 Unified Mapped Ram/Cache [Flexible Allocation]

Configurable up to 1MB of L2 Cache

512K-Bit (64K-Byte) L3 ROM

Time Stamp Counter

Enhanced VCP2

Supports Over 694 7.95-Kbps AMR

Programmable Code Parameters

Two Enhanced Turbo Decoder Coprocessors (TCP2_A and TCP2_B)

Each TCP2 Supports up to Eight 2-Mbps 3GPP (6 Iterations)

Programmable Turbo Code and Decoding Parameters

64-Bit External Memory Interface (EMIFA)

Glueless Interface to Asynchronous Memories (SRAM, Flash, and EEPROM) and Synchronous Memories (SBSRAM, ZBT SRAM)

Supports Interface to Standard Sync Devices and Custom Logic (FPGA, CPLD, ASICs, etc.)

32M-Byte Total Addressable External Memory Space

32-Bit DDR2 Memory Controller (DDR2-667 SDRAM)