ADSP-21990BSTZ今日新到货！

ADSP-21990BSTZ今日新到货！ 20只可以发货 批次：22+   15818661396叶小姐

ADSP-21990BSTZ特点：

• 160 MHz，ADSP-219x DSP内核

• 8通道、14位、20 MSPS ADC，内置片上电压基准

• 4K字程序存储器RAM

• 4K字数据存储器RAM

• 外部存储器接口（达1 M字）

• 带双辅助PWM输出的三相PWM发生单元

• 增量编码器接口单元

• 3个32位通用定时器

• 16位通用标识I/O端口

• 同步串行(SPORT)和SPI通信端口

ADSP-2199x, 16-bit, fixed-point DSP core with up to 160 

MIPS sustained performance

8K words of on-chip RAM, configured as 4K words on-chip, 

24-bit program RAM and 4K words on-chip, 16-bit 

data RAM

External memory interface

Dedicated memory DMA controller for data/instruction 

transfer between internal/external memory

Programmable PLL and flexible clock generation circuitry 

enables full speed operation from low speed input clocks

IEEE JTAG Standard 1149.1 test access port supports on-chip 

emulation and system debugging

8-channel, 14-bit analog-to-digital converter system, with up 

to 20 MSPS sampling rate (at 160 MHz core clock rate)

3-phase, 16-bit, center-based PWM generation unit with 12.5 

ns resolution at 160 MHz core clock (CCLK) rate

Dedicated 32-bit encoder interface unit with companion 

encoder event timer

Dual 16-bit auxiliary PWM outputs

16 general-purpose flag I/O pins

3 programmable 32-bit interval timers

SPI communications port with master or slave operation

Synchronous serial communications port (SPORT) capable of 

software UART emulation

Integrated watchdog timer

Dedicated peripheral interrupt controller with software 

priority control

Multiple boot modes

Precision 1.0 V voltage reference

Integrated power-on-reset (POR) generator

Flexible power management with selectable power-down 

and idle modes

2.5 V internal operation with 3.3 V I/O

Operating temperature range of –40C to +85C

196-ball CSP_BGA and 176-lead LQFP package

The Analog Devices family of emulators are tools that every DSP developer needs to test and debug hardware and software systems. Analog Devices has supplied an IEEE 1149.1 JTAG test access port (TAP) on each JTAG DSP. The emulator uses the TAP to access the internal features of the DSP, allowing the developer to load code, set breakpoints, observe variables, observe memory, and examine registers. The DSP must be halted to send data and commands, but once an operation has been completed by the emulator, the DSP system is set running at full speed with no impact on system timing.