ADN4604ASVZ到现货批次新!
日期:2022-7-28ADN4604ASVZ到现货批次新!1221只可以发货,批次2107+ 订购联系:15818661396叶小姐
ADN4604ASVZ特点:
每端口的NRZ数据速率:DC至4.25 Gbps
可编程接收均衡
可编程发射预加重/去加重
低功耗:每通道130 mW(3.3 V,启用输出)
16 x 16、完全差分、非阻塞式阵列
低抖动:20 ps(典型值)
灵活的I/O电源范围
直流耦合或交流耦合差分CML输入
可编程CML输出级
按通道输入P/N对翻转,便于路由
50 Ω片内I/O端接 支持8b/10b加扰或无编码NRZ数据
欲了解更多特性,请参考数据手册
DC to 4.25 Gbps per port NRZ data rate
Programmable receive equalization
12 dB boost at 2 GHz
Compensates 40 inches of FR4 at 4.25 Gbps
Programmable transmit preemphasis/deemphasis
Up to 12 dB boost at 4.25 Gbps
Compensates 40 inches of FR4 at 4.25 Gbps
Low power: 130 mW per channel at 3.3 V (outputs enabled)
16 × 16, fully differential, nonblocking array
Double rank connection programming with dual
connection maps
Low jitter, typically 20 ps
Flexible I/O supply range
DC- or ac-coupled differential CML inputs
Programmable CML output levels
Per-lane input P/N pair inversion for routing ease
50 Ω on-chip I/O termination
Supports 8b/10b, scrambled or uncoded NRZ data
Serial (I
2C slave or SPI) control interface
100-lead TQFP, Pb-free package
ADN4604ASVZ应用:
光纤网络开关
背板千兆以太网:1000BASE-KX
高速串行背板路由至OC-48(带FEC)
1×、2×和4×光纤通道
数字视频(HDMI、DVI、DisplayPort、3G-/HD-/SD-SDI)
数据存储网络
LVDS
The high speed differential inputs and outputs should be routed with 100 Ω controlled impedance differential transmission lines. The transmission lines, either microstrip or stripline, should be referenced to a solid low impedance reference plane. An example of a PCB cross-section is shown in Figure 55. The trace width (W), differential spacing (S), height above reference plane (H), and dielectric constant of the PCB material determine the characteristic impedance. Adjacent channels should be kept apart by a distance greater than 3 W to minimize crosstalk