PI6C180B
Precision 1-18 Clock Buffer
2
2-Wire I C Control
2
The I C interface permits individual enable/disable of each clock
Each data transfer is initiated with a start condition and ended with
a stop condition. The first byte after a start condition is always a
7-bit address byte followed by a read/write bit. (HIGH = read from
addresseddevice,LOW=writetoaddresseddevice).Ifthedevices
own address is detected, PI6C180B generates an acknowledge by
pulling SDATA line LOW during ninth clock pulse, then accepts
the following data bytes until another start or stop condition is
detected.
output and test mode enable.
ThePI6C180Bisaslavereceiverdevice. Itcannotbereadback. Sub
addressing is not supported. All preceding bytes must be sent in
order to change one of the control bytes.
Every bite put on the SDATA line must be 8-bits long (MSB first),
followed by an acknowledge bit generated by the receiving device.
DuringnormaldatatransfersSDATAchangesonlywhenSCLOCK
isLOW. Exceptions: AHIGHtoLOWtransitiononSDATAwhile
SCLOCK is HIGH indicates a start condition. A LOW to HIGH
transitiononSDATAwhileSCLOCKisHIGHisastopcondition
and indicates the end of a data transfer cycle.
Following acknowledgement of the address byte (D2), two more
bytes must be sent:
1. Command Code byte, and
2. Byte Count byte.
Although the data bits on these two bytes are dont care, they
must be sent and acknowledged.
Byte2: Optional Register for Possible Future
Requirements (1 = enable, 0 = disable)
Byte1: SDRAM Active/Inactive Register
(1 = enable, 0 = disable)
Bit Pin #
Description
SDRAM17 (Active/Inactive)
SDRAM16 (Active/Inactive)
(Reserved)
Bit
Pin #
45
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SDRAM15 (Active/Inactive)
SDRAM14 (Active/Inactive)
SDRAM13 (Active/Inactive)
SDRAM12 (Active/Inactive)
SDRAM11 (Active/Inactive)
SDRAM10 (Active/Inactive)
SDRAM9 (Active/Inactive)
SDRAM8 (Active/Inactive)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
28
21
44
41
40
(Reserved)
36
(Reserved)
35
(Reserved)
32
(Reserved)
31
(Reserved)
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other conditions
above those indicated in the operational
sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect reliability.
Storage Temperature .............................................................–65°C to +150°C
Ambient Temperature with Power Applied .............................. –0°C to +70°C
3.3V Supply Voltage to Ground Potential .............................. –0.5V to +4.6V
DC Input Voltage .................................................................... –0.5V to +4.6V
Supply Current (V = +3.465V, C
= Max.)
LOAD
DD
Symbol
Parameter
Supply Current
Supply Current
Supply Current
Test Condition
BUF_IN = 0 MHz
Min. Typ. Max.
Units
I
3
DD
I
BUF_IN = 66.66 MHz
BUF_IN = 100.0 MHz
230
360
mA
DD
I
DD
PS8468
05/03/00
3