TL062CDR各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢆꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢈ ꢅ ꢀꢁ ꢂꢃ ꢈꢆ

ꢀ ꢁꢂ ꢃ ꢈ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢉꢇ

ꢁ

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SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

D

Very Low Power Consumption

D

Output Short-Circuit Protection

High Input Impedance . . . JFET-Input Stage

Internal Frequency Compensation

Latch-Up-Free Operation

Typical Supply Current . . . 200 µA

(Per Amplifier)

Wide Common-Mode and Differential

Voltage Ranges

High Slew Rate . . . 3.5 V/µs Typ

D

Low Input Bias and Offset Currents

Common-Mode Input Voltage Range

D

Includes V

CC+

TL061, TL061A . . . D, P, OR PS PACKAGE

TL061B . . . P PACKAGE

(TOP VIEW)

TL062 . . . D, JG, P, PS, OR PW PACKAGE

TL062A . . . D, P, OR PS PACKAGE

TL062B . . . D OR P PACKAGE

(TOP VIEW)

OFFSET N1

IN−

1

2

3

4

NC

V

OUT

8

7

6

5

1OUT

1IN−

1IN+

1

2

3

4

8

7

6

5

V

CC+

2OUT

2IN−

2IN+

IN+

V

OFFSET N2

CC−

V

CC−

TL062 . . . FK PACKAGE

(TOP VIEW)

TL064 . . . FK PACKAGE

(TOP VIEW)

TL064 . . . D, J, N, NS, PW, OR W PACKAGE

TL064A, TL064B . . . D OR N PACKAGE

(TOP VIEW)

1OUT

1IN−

1IN+

1

2

3

4

5

6

7

14 4OUT

13

12 4IN+

4IN−

3

2

1

20 19

18

3

2

1

20 19

18

NC

4

5

6

7

8

4IN+

NC

1IN−

NC

4

5

6

7

8

1IN+

NC

2OUT

NC

V

11

10

9

V

17

16

15

17

16

15

14

CC+

CC−

V

2IN+

2IN−

3IN+

3IN−

3OUT

V

CC−

CC+

NC

2IN−

NC

3IN+

1IN+

NC

14 NC

9 10 11 12 13

8

2OUT

2IN+

9 10 11 12 13

NC − No internal connection

description/ordering information

The JFET-input operational amplifiers of the TL06_ series are designed as low-power versions of the

TL08_ series amplifiers. They feature high input impedance, wide bandwidth, high slew rate, and low input offset

and input bias currents. The TL06_ series features the same terminal assignments as the TL07_ and

TL08_ series. Each of these JFET-input operational amplifiers incorporates well-matched, high-voltage JFET

and bipolar transistors in an integrated circuit.

The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized

for operation from −40°C to 85°C, and the M-suffix devices are characterized for operation over the full military

temperature range of −55°C to 125°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

ꢍꢏ ꢊ ꢗꢔ ꢘ ꢀꢒ ꢊ ꢓ ꢗ ꢆꢀꢆ ꢙꢚ ꢛ ꢜꢝ ꢞ ꢟꢠ ꢙꢜꢚ ꢙꢡ ꢢꢣ ꢝ ꢝ ꢤꢚꢠ ꢟꢡ ꢜꢛ ꢥꢣꢦ ꢧꢙꢢ ꢟꢠ ꢙꢜꢚ ꢨꢟ ꢠꢤ ꢩ

ꢍꢝ ꢜ ꢨꢣꢢ ꢠ ꢡ ꢢ ꢜꢚ ꢛꢜ ꢝ ꢞ ꢠ ꢜ ꢡ ꢥꢤ ꢢ ꢙꢛ ꢙꢢꢟ ꢠꢙ ꢜꢚꢡ ꢥꢤ ꢝ ꢠꢪ ꢤ ꢠꢤ ꢝ ꢞꢡ ꢜꢛ ꢀꢤꢫ ꢟꢡ ꢒꢚꢡ ꢠꢝ ꢣꢞ ꢤꢚꢠ ꢡ

ꢡ ꢠ ꢟ ꢚꢨ ꢟ ꢝꢨ ꢬ ꢟ ꢝꢝ ꢟ ꢚ ꢠꢭꢩ ꢍꢝ ꢜ ꢨꢣꢢ ꢠꢙꢜꢚ ꢥꢝ ꢜꢢ ꢤꢡ ꢡꢙ ꢚꢮ ꢨꢜꢤ ꢡ ꢚꢜꢠ ꢚꢤ ꢢꢤ ꢡꢡ ꢟꢝ ꢙꢧ ꢭ ꢙꢚꢢ ꢧꢣꢨ ꢤ

ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ

Copyright  2004, Texas Instruments Incorporated

ꢊ ꢚ ꢥ ꢝ ꢜꢨ ꢣꢢ ꢠꢡ ꢢꢜ ꢞꢥ ꢧꢙ ꢟꢚ ꢠ ꢠꢜ ꢕꢒ ꢁꢌ ꢍꢏ ꢑ ꢌꢯꢰꢱ ꢯꢱꢅ ꢟꢧꢧ ꢥꢟ ꢝ ꢟ ꢞꢤ ꢠꢤꢝ ꢡ ꢟ ꢝ ꢤ ꢠꢤ ꢡꢠꢤ ꢨ

ꢣ ꢚꢧ ꢤꢡꢡ ꢜ ꢠꢪꢤ ꢝ ꢬꢙ ꢡꢤ ꢚ ꢜꢠꢤ ꢨꢩ ꢊ ꢚ ꢟꢧ ꢧ ꢜ ꢠꢪꢤ ꢝ ꢥꢝ ꢜ ꢨꢣꢢ ꢠꢡ ꢅ ꢥꢝ ꢜ ꢨꢣꢢ ꢠꢙꢜ ꢚ

ꢥ ꢝ ꢜꢢꢤ ꢡꢡꢙ ꢚꢮ ꢨ ꢜꢤꢡ ꢚ ꢜꢠ ꢚ ꢤꢢꢤꢡ ꢡꢟꢝ ꢙ ꢧꢭ ꢙ ꢚꢢꢧ ꢣ ꢨꢤ ꢠꢤꢡ ꢠꢙꢚ ꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞꢤ ꢠꢤꢝ ꢡ ꢩ

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

description/ordering information (continued)

ORDERING INFORMATION

V

MAX

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

IO

†

T

A

PACKAGE

AT 25°C

TL061CP

PDIP (P)

PDIP (N)

Tube of 50

TL062CP

TL064CN

Tube of 25

Tube of 75

Reel of 2500

Tube of 75

Reel of 2500

Tube of 50

Reel of 2500

TL064CN

TL061CD

TL061C

TL062C

TL064C

TL061CDR

TL062CD

SOIC (D)

TL062CDR

TL064CD

15 mV

TL064CDR

TL061CPSR

TL062CPSR

TL064CNSR

TL062CPW

TL062CPWR

TL064CPW

TL064CPWR

TL061ACP

TL062ACP

TL064ACN

TL061ACD

TL061ACDR

TL062ACD

TL062ACDR

TL064ACD

TL064ACDR

TL061ACPSR

TL062ACPSR

TL061BCP

TL062BCP

TL064BCN

TL062BCD

TL062BCDR

TL064BCD

TL064BCDR

T061

T062

TL064

SOP (PS)

SOP (NS)

Reel of 2000

Tube of 150

Reel of 2000

Tube of 90

T062

T064

TSSOP (PW)

Reel of 2000

TL061ACP

TL062ACP

TL064ACN

0°C to 70°C

PDIP (P)

PDIP (N)

Tube of 50

Tube of 25

Tube of 75

Reel of 2500

Tube of 75

Reel of 2500

Tube of 50

Reel of 2500

061AC

6 mV

SOIC (D)

062AC

TL064AC

T061A

SOP (PS)

Reel of 2000

Tube of 50

T062A

TL061BCP

TL062BCP

TL064BCN

PDIP (P)

PDIP (N)

Tube of 25

Tube of 75

Reel of 2500

Tube of 50

Reel of 2500

3 mV

062BC

SOIC (D)

TL064BC

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢆꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢈꢅ ꢀꢁ ꢂꢃ ꢈꢆ

ꢀ ꢁꢂ ꢃ ꢈ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢉꢇ

ꢁ ꢊꢋꢌꢍꢊ ꢋ ꢎꢏ ꢐ ꢑ ꢎꢀꢌꢒ ꢓꢍꢔꢀ ꢊ ꢍꢎꢏ ꢆꢀ ꢒꢊ ꢓꢆꢁ ꢆꢕ ꢍ ꢁꢒ ꢑꢒ ꢎꢏ ꢖ

SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

description/ordering information (continued)

ORDERING INFORMATION (continued)

V

MAX

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

IO

AT 25°C

†

T

A

PACKAGE

TL061IP

PDIP (P)

PDIP (N)

Tube of 50

TL062IP

TL064IN

Tube of 25

Tube of 75

Reel of 2000

Tube of 75

Reel of 2000

Tube of 50

Reel of 2500

Reel of 2000

Tube of 50

Tube of 55

Tube of 25

Tube of 150

Tube of 55

TL064IN

TL061ID

TL061I

TL062I

TL064I

TL061IDR

TL062ID

−40°C to 85°C

6 mV

SOIC (D)

TL062IDR

TL064ID

TL064IDR

TL062IPWR

TL062MJG

TL062MFK

TL064MJ

TL064MW

TL064MFK

TSSOP (PW)

CDIP (JG)

LCCC (FK)

CDIP (J)

TL062I

TL062MJG

TL062MFK

TL064MJ

TL064MW

TL064MFK

6 mV

9 mV

−55°C to 125°C

CFP (W)

LCCC (FK)

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

symbol (each amplifier)

+

−

IN+

IN−

OUT

OFFSET N1

OFFSET N2

Offset Null/Compensation

TL061 Only

schematic (each amplifier)

V

CC+

IN+

IN−

50 Ω

100 Ω

C1

OFFSET N1

OFFSET N2

OUT

V

CC−

TL061 Only

C1 = 10 pF on TL061, TL062, and TL064

Component values shown are nominal.

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢆꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢈꢅ ꢀꢁ ꢂꢃ ꢈꢆ

ꢀ ꢁꢂ ꢃ ꢈ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢉꢇ

ꢁ ꢊꢋꢌꢍꢊ ꢋ ꢎꢏ ꢐ ꢑ ꢎꢀꢌꢒ ꢓꢍꢔꢀ ꢊ ꢍꢎꢏ ꢆꢀ ꢒꢊ ꢓꢆꢁ ꢆꢕ ꢍ ꢁꢒ ꢑꢒ ꢎꢏ ꢖ

SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

TL06_C

TL06_AC

TL06_BC

TL06_I

TL06_M

UNIT

Supply voltage, V

(see Note 1)

18

−18

30

18

−18

30

18

−18

V

CC+

CC−

Differential input voltage, V (see Note 2)

ID

30

Input voltage, V (see Notes 1 and 3)

I

15

Duration of output short circuit (see Note 4)

Unlimited

97

Unlimited

97

Unlimited

D (8-pin) package

D (14-pin) package

N package

86

80

NS package

76

Package thermal impedance, θ (see Notes 5 and 6)

°C/W

P package

85

JA

PS package

95

PW (8-pin) package

149

PW (14-pin)

package

113

150

113

150

FK package

J package

5.61

15.05

14.5

14.65

150

Package thermal impedance, θ (see Notes 7 and 8)

JC

°C/W

JG package

W package

Operating virtual junction temperature, T

Case temperature for 60 seconds

°C

J

FK package

260

Lead temperature 1,6 mm (1/16 inch) from case for 60

seconds

J, JG, U, or

W package

300

°C

Lead temperature 1,6 mm (1/6 inch) from case for 10

seconds

D, N, NS, P, PS,

or PW package

260

°C

Storage temperature range, T

stg

−65 to 150

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values except differential voltages are with respect to the midpoint between V

2. Differential voltages are at IN+ with respect to IN−.

and V .

CC−

CC+

3. The magnitude of the input voltage should never exceed the magnitude of the supply voltage or 15 V, whichever is less.

4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the

dissipation rating is not exceeded.

5. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable

JA

J

A

ambient temperature is P = (T (max) − T )/θ . Operating at the absolute maximum T of 150°C can affect reliability.

D

J

A

JA

J

6. The package thermal impedance is calculated in accordance with JESD 51-7.

7. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable case

J

JC

C

temperature is P = (T (max) − T )/θ . Operating at the absolute maximum T of 150°C can affect reliability.

D

J

C

JC

J

8. The package thermal impedance is calculated in accordance with MIL-STD-883.

5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

electrical characteristics, V

= 15 V (unless otherwise noted)

CC

TL061C

TL062C

TL064C

TL061AC

TL062AC

TL064AC

†

PARAMETER

UNIT

TEST CONDITIONS

MIN

TYP

MAX

15

MIN

TYP

MAX

6

T = 25°C

A

3

V

R

= 0,

= 50 Ω

O

S

V

IO

Input offset voltage

mV

T

= Full range

20

7.5

A

Temperature coefficient

of input offset voltage

V

T

A

= 0, R = 50 Ω,

= Full range

O

S

α_VIO

10

5

10

5

µV/°C

T

= 25°C

200

5

100

3

pA

nA

pA

nA

A

I

Input offset current

V

O

= 0

IO

T

A

= Full range

= 25°C

T

A

30

400

10

30

200

7

‡

V

O

Input bias current

IB

T

A

= Full range

−12

to

15

−12

to

15

Common-mode

input voltage range

V

T

= 25°C

11

V

ICR

A

R

= 10 kΩ,

≥ 10 kΩ,

T = 25°C

A

10

3

13.5

6

10

4

13.5

6

Maximum peak output

voltage swing

L

V

OM

R

T

= Full range

T = 25°C

A

Large-signal differential

voltage amplification

V

R

=

10 V,

O

L

A

VD

V/mV

≥ 10 kΩ

T

= Full range

= 25°C

A

3

4

A

B

1

Unity-gain bandwidth

Input resistance

R

= 10 kΩ,

= 25°C

T

1

MHz

L

12

10

12

10

r

T

A

Ω

i

Common-mode rejection

ratio

V

R

= V min, V = 0,

ICR O

IC

S

CMRR

70

86

80

86

dB

= 50 Ω, T = 25°C

A

Supply-voltage rejection

ratio

V

T

A

=

9 V to 15 V,

CC

O

= 0, R = 50 Ω,

k

95

6

95

6

dB

S

SVR

(∆V

/∆V

)

= 25°C

CC

IO

Total power dissipation

(each amplifier)

V

O

= 0,

T

= 25°C,

= 25°C

A

P

D

7.5

mW

No load

Supply current

(each amplifier)

V

O

= 0,

T

A

I

200

120

250

200

120

250

µA

CC

No load

V /V

O1 O2

Crosstalk attenuation

A

VD

= 100,

T

A

dB

†

‡

All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified. Full range for

is 0°C to 70°C for TL06_C, TL06_AC, and TL06_BC and −40°C to 85°C for TL06_I.

Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in

Figure 15. Pulse techniques are used to maintain the junction temperature as close to the ambient temperature as possible.

T

A

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢆꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢈꢅ ꢀꢁ ꢂꢃ ꢈꢆ

ꢀ ꢁꢂ ꢃ ꢈ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢉꢇ

ꢁ ꢊꢋꢌꢍꢊ ꢋ ꢎꢏ ꢐ ꢑ ꢎꢀꢌꢒ ꢓꢍꢔꢀ ꢊ ꢍꢎꢏ ꢆꢀ ꢒꢊ ꢓꢆꢁ ꢆꢕ ꢍ ꢁꢒ ꢑꢒ ꢎꢏ ꢖ

SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

electrical characteristics, V

= 15 V (unless otherwise noted)

CC

TL061BC

TL062BC

TL064BC

TL061I

TL062I

TL064I

†

PARAMETER

UNIT

TEST CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

T = 25°C

A

2

3

5

3

6

9

V

R

= 0,

= 50 Ω

O

S

V

IO

Input offset voltage

mV

T

= Full range

A

Temperature coefficient of

input offset voltage

V

T

A

= 0, R = 50 Ω,

= Full range

O

S

α_VIO

10

5

10

5

µV/°C

T

= 25°C

100

3

100

10

pA

nA

pA

nA

A

I

Input offset current

V

O

= 0

IO

T

A

= Full range

= 25°C

T

A

30

200

7

30

200

20

‡

V

O

Input bias current

IB

T

A

= Full range

−12

to

15

−12

to

15

Common-mode

input voltage range

V

T

= 25°C

11

V

ICR

A

R

= 10 kΩ,

≥ 10 kΩ,

T = 25°C

A

10

4

13.5

6

10

4

13.5

6

Maximum peak output

voltage swing

L

V

OM

R

T

= Full range

T = 25°C

A

Large-signal differential

voltage amplification

V

R

=

10 V,

O

L

A

VD

V/mV

≥ 10 kΩ

T

= Full range

= 25°C

A

4

A

B

1

Unity-gain bandwidth

Input resistance

R

= 10 kΩ,

= 25°C

T

1

MHz

L

12

10

12

10

r

T

A

Ω

i

Common-mode

rejection ratio

V

R

= V min, V = 0,

ICR O

IC

S

CMRR

80

86

80

86

dB

= 50 Ω, T = 25°C

A

Supply-voltage rejection

ratio

V

T

A

=

9 V to 15 V,

CC

O

= 0, R = 50 Ω,

k

95

6

95

6

dB

S

SVR

(∆V

/∆V

)

= 25°C

CC

IO

Total power dissipation

(each amplifier)

V

O

= 0,

T

= 25°C,

= 25°C

A

P

D

7.5

mW

No load

Supply current

(each amplifier)

V

O

= 0,

T

A

I

200

120

250

200

120

250

µA

CC

No load

V /V

O1 O2

Crosstalk attenuation

A

VD

= 100,

T

A

dB

†

‡

All characteristics are measured under open-loop conditions with zero common-mode input voltage, unless otherwise specified. Full range for

is 0°C to 70°C for TL06_C, TL06_AC, and TL06_BC and −40°C to 85°C for TL06_I.

Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in

Figure 15. Pulse techniques are used to maintain the junction temperature as close to the ambient temperature as possible.

T

A

7

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

electrical characteristics, V

= 15 V (unless otherwise noted)

CC

TL061M

TL064M

TL062M

TYP

3

†

PARAMETER

UNIT

TEST CONDITIONS

MIN

MAX

MIN

TYP

MAX

9

T = 25°C

A

6

9

3

V

R

= 0,

= 50 Ω

O

S

V

IO

Input offset voltage

mV

T

= −55°C to 125°C

15

A

Temperature coefficient

of input offset voltage

V

T

A

= 0, R = 50 Ω,

S

O

α_VIO

10

5

10

5

µV/°C

=

−55°C to 125°C

T

A

= 25°C

100

20*

20

100

20*

20

pA

T

= −55°C

= 125°C

= 25°C

I

IO

Input offset current

V

= 0

A

O

nA

pA

T

A

T

A

30

200

50*

50

30

200

50*

50

‡

T

A

= −55°C

= 125°C

I

IB

V

Input bias current

nA

V

T

A

−12

to

15

−12

to

15

Common-mode

input voltage range

=

V

T

A

25°C

11.5

ICR

R

= 10 kΩ,

≥ 10 kΩ,

T = 25°C

A

10

13.5

10

13.5

Maximum peak output

voltage swing

L

V

OM

R

T

A

= −55°C to 125°C

Large-signal differential

T

= 25°C

4

6

4

6

A

V

R

= 10 V,

≥ 10 kΩ

O

L

A

VD

V/mV

T

= −55°C to 125°C

= 25°C

A

voltage amplification

Unity-gain bandwidth

Input resistance

A

B

1

R

= 10 kΩ,

= 25°C

T

MHz

L

12

10

12

10

r

T

A

Ω

i

Common-mode

rejection ratio

V

R

= V min, V = 0,

ICR O

IC

S

CMRR

80

86

95

6

80

86

95

6

dB

= 50 Ω, T = 25°C

A

Supply-voltage

rejection

V

R

=

9 V to 15 V, V = 0,

O

k

dB

CC

SVR

= 50 Ω, T = 25°C

ratio (∆V

/∆V )

S

A

CC

IO

Total power dissipation

(each amplifier)

V

O

= 0,

T

= 25°C,

= 25°C

A

P

D

7.5

mW

No load

Supply current

(each amplifier)

V

O

= 0,

T

A

I

200

120

250

200

120

250

µA

CC

No load

V /V

O1 O2

Crosstalk attenuation

A

VD

= 100,

T

A

dB

* This parameter is not production tested.

†

‡

All characteristics are measured under open-loop conditions, with zero common-mode voltage, unless otherwise specified.

Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in

Figure 15. Pulse techniques are used to maintain the junction temperature as close to the ambient temperature as possible.

operating characteristics, V

= 15 V, T = 25°C

A

CC

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

V = 10 V, = 100 pF,

C

I

L

SR

Slew rate at unity gain (see Note 5)

1.5

3.5

V/µs

R

= 10 kΩ,

See Figure 1

R = 10 kΩ,

L

t

r

Rise time

0.2

10%

42

V = 20 mV,

I

µs

C

= 100 pF,

See Figure 1

Overshoot factor

L

V

n

Equivalent input noise voltage

R

= 20 Ω,

f = 1 kHz

nV/√Hz

S

NOTE 5: Slew rate at −55°C to 125°C is 0.7 V/µs min.

8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢆꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢈꢅ ꢀꢁ ꢂꢃ ꢈꢆ

ꢀ ꢁꢂ ꢃ ꢈ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢉꢇ

ꢁ ꢊꢋꢌꢍꢊ ꢋ ꢎꢏ ꢐ ꢑ ꢎꢀꢌꢒ ꢓꢍꢔꢀ ꢊ ꢍꢎꢏ ꢆꢀ ꢒꢊ ꢓꢆꢁ ꢆꢕ ꢍ ꢁꢒ ꢑꢒ ꢎꢏ ꢖ

SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

PARAMETER MEASUREMENT INFORMATION

10 kΩ

−

OUT

1 kΩ

−

+

V

I

V

I

OUT

R

= 2 kΩ

C

= 100 pF

L

R

C

= 100 pF

L

Figure 1. Unity-Gain Amplifier

Figure 2. Gain-of-10 Inverting Amplifier

−

IN−

IN+

TL061

+

OUT

N2

N1

100 kΩ

1.5 kΩ

V

CC−

Figure 3. Input Offset-Voltage Null Circuit

9

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

Maximum peak output voltage vs Supply voltage

4

5

Maximum peak output voltage vs Free-air temperature

Maximum peak output voltage vs Load resistance

Maximum peak output voltage vs Frequency

Differential voltage amplification vs Free-air temperature

Large-signal differential voltage amplification vs Frequency

Phase shift vs Frequency

6

7

8

9

Supply current vs Supply voltage

10

11

12

13

14

15

16

17

18

Supply current vs Free-air temperature

Total power dissipation vs Free-air temperature

Common-mode rejection ratio vs Free-air temperature

Normalized unity-gain bandwidth vs Free-air temperature

Normalized slew rate vs Free-air temperature

Normalized phase shift vs Free-air temperature

Input bias current vs Free-air temperature

Voltage-follower large-signal pulse response vs Time

Output voltage vs Elapsed time

Equivalent input noise voltage vs Frequency

10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢆꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢈꢅ ꢀꢁ ꢂꢃ ꢈꢆ

ꢀ ꢁꢂ ꢃ ꢈ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢉꢇ

ꢁ ꢊꢋꢌꢍꢊ ꢋ ꢎꢏ ꢐ ꢑ ꢎꢀꢌꢒ ꢓꢍꢔꢀ ꢊ ꢍꢎꢏ ꢆꢀ ꢒꢊ ꢓꢆꢁ ꢆꢕ ꢍ ꢁꢒ ꢑꢒ ꢎꢏ ꢖ

SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

†

TYPICAL CHARACTERISTICS

MAXIMUM PEAK OUTPUT VOLTAGE

vs

FREE-AIR TEMPERATURE

SUPPLY VOLTAGE

15

12.5

10

15

12.5

10

R

T

= 10 kΩ

= 25°C

L

A

See Figure 2

7.5

5

7.5

5

2.5

0

2.5

0

V

R

=

15 V

CC

L

= 10 kΩ

See Figure 2

0

2

4

6

8

10

12

14

16

−75 −50 −25

0

25

50

75

100 125

|V

CC

| − Supply Voltage − V

T

A

− Free-Air Temperature − °C

Figure 4

Figure 5

MAXIMUM PEAK OUTPUT VOLTAGE

vs

LOAD RESISTANCE

FREQUENCY

15

12.5

10

V

=

15 V

12 V

CC

V

=

15 V

CC

R

= 10 kΩ

T = 25°C

A

L

T

A

= 25°C

12.5

10

See Figure 2

V

CC

=

7.5

5

7.5

5

V

CC

=

5 V

2.5

0

2.5

0

1 k

10 k

100 k

1 M

10 M

100

200

400 700 1 k

2 k

4 k 7 k 10 k

f − Frequency − Hz

R

− Load Resistance − Ω

L

Figure 6

Figure 7

†

Data at high and low temperatures are applicable only within the specified operating free-air temperature ranges of the various devices.

11

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

†

TYPICAL CHARACTERISTICS

DIFFERENTIAL VOLTAGE AMPLIFICATION

vs

FREE-AIR TEMPERATURE

10

7

V

=

15 V

CC

R

= 10 kΩ

L

4

2

1

−75 −50 −25

0

25

50

75 100 125

T

A

− Free-Air Temperature − °C

Figure 8

LARGE-SIGNAL

DIFFERENTIAL VOLTAGE

AMPLIFICATION AND PHASE SHIFT

vs

FREQUENCY

100

10

V

R

=

= 0

15 V

CC

ext

0°

R

T

A

= 10 kΩ

= 25°C

L

Phase Shift

(right scale)

45°

90°

135°

180°

1

0.1

A

VD

(left scale)

0.01

0.001

1

10

100

1 k

10 k 100 k 1 M 10 M

f − Frequency − Hz

Figure 9

†

Data at high and low temperatures are applicable only within the specified operating free-air temperature ranges of the various devices.

12

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢆꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢈꢅ ꢀꢁ ꢂꢃ ꢈꢆ

ꢀ ꢁꢂ ꢃ ꢈ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢉꢇ

ꢁ ꢊꢋꢌꢍꢊ ꢋ ꢎꢏ ꢐ ꢑ ꢎꢀꢌꢒ ꢓꢍꢔꢀ ꢊ ꢍꢎꢏ ꢆꢀ ꢒꢊ ꢓꢆꢁ ꢆꢕ ꢍ ꢁꢒ ꢑꢒ ꢎꢏ ꢖ

SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

†

TYPICAL CHARACTERISTICS

SUPPLY CURRENT

vs

SUPPLY VOLTAGE

SUPPLY CURRENT

vs

FREE-AIR TEMPERATURE

250

200

250

200

150

100

T

= 25°C

A

No Signal

No Load

150

100

50

V

=

15 V

CC

No Signal

No Load

0

2

4

6

8

10

12

14

16

−75 −50 −25

0

25

50

75

100 125

T

A

− Free-Air Temperature − °C

|V

CC

| − Supply Voltage − V

Figure 10

Figure 11

ALL EXCEPT TL06_C

COMMON-MODE REJECTION RATIO

TOTAL POWER DISSIPATION

vs

FREE-AIR TEMPERATURE

87

86

85

84

83

30

25

V

R

=

15 V

CC

L

= 10 kΩ

TL064

V

= 15 V

CC

No Signal

No Load

20

15

TL062

TL061

10

5

82

81

0

−75 −50 −25

0

25

50

75 100 125

−75 −50 −25

0

25

50

75 100 125

T

A

− Free-Air Temperature − °C

T

A

− Free-Air Temperature − °C

Figure 12

Figure 13

†

Data at high and low temperatures are applicable only within the specified operating free-air temperature ranges of the various devices.

13

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

TYPICAL CHARACTERISTICS

NORMALIZED UNITY-GAIN BANDWIDTH,

SLEW RATE, AND PHASE SHIFT

vs

FREE-AIR TEMPERATURE

1.03

1.02

1.3

1.2

Unity-Gain Bandwidth

(left scale)

Phase Shift

(right scale)

1.01

1.1

1

Slew Rate

(left scale)

1

0.99

0.9

V

R

=

15 V

CC

L

0.98

0.97

0.8

0.7

= 10 kΩ

f = B1 for Phase Shift

−75 −50 −25

0

25

50

75

100

125

T

A

− Free-Air Temperature − °C

Figure 14

VOLTAGE-FOLLOWER

LARGE-SIGNAL PULSE RESPONSE

INPUT BIAS CURRENT

vs

FREE-AIR TEMPERATURE

vs

TIME

6

4

100

40

Input

V

CC

= 15 V

10

4

2

0

1

Output

0.4

−2

−4

V

= 15 V

CC

0.1

R

C

= 10 kΩ

= 100 pF

= 25°C

L

0.04

T

A

0.01

−6

−50

−25

0

25

50

75

100

125

0

2

4

6

8

10

T

A

− Free-Air Temperature − °C

t − Time − µs

Figure 15

Figure 16

14

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢆꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢈꢅ ꢀꢁ ꢂꢃ ꢈꢆ

ꢀ ꢁꢂ ꢃ ꢈ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢉꢇ

ꢁ ꢊꢋꢌꢍꢊ ꢋ ꢎꢏ ꢐ ꢑ ꢎꢀꢌꢒ ꢓꢍꢔꢀ ꢊ ꢍꢎꢏ ꢆꢀ ꢒꢊ ꢓꢆꢁ ꢆꢕ ꢍ ꢁꢒ ꢑꢒ ꢎꢏ ꢖ

SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

TYPICAL CHARACTERISTICS

EQUIVALENT INPUT NOISE VOLTAGE

OUTPUT VOLTAGE

vs

FREQUENCY

ELAPSED TIME

100

90

28

24

20

V

R

T

A

= 15 V

= 20 Ω

= 25°C

CC

S

Overshoot

80

70

60

50

90%

16

12

8

40

30

20

10

4

10%

V

= 15 V

CC

0

R

T

A

= 10 kΩ

= 25°C

L

t

r

0

−4

10

40 100

400 1 k

f − Frequency − Hz

4 k 10 k

40 k 100 k

0

0.2

0.4

0.6

0.8

1

1.2

1.4

t − Elapsed Time − µs

Figure 18

Figure 17

15

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

APPLICATION INFORMATION

Table of Application Diagrams

PART

APPLICATION DIAGRAM

NUMBER

FIGURE

Instrumentation amplifier

TL064

TL061

TL064

TL061

TL062

19

20

21

22

23

24

25

26

27

0.5-Hz square-wave oscillator

High-Q notch filter

Audio-distribution amplifier

Low-level light detector preamplifier

AC amplifier

Microphone preamplifier with tone control

Instrumentation amplifier

IC preamplifier

V

CC+

−

10 kΩ

0.1%

10 kΩ

0.1%

TL064

100 kΩ

+

V

CC+

Input A

−

V

CC−

CC+

Output

TL064

+

100 kΩ

V

1 MΩ

V

CC+

V

CC−

−

+

Input B

+

100 kΩ

TL064

100 kΩ

10 kΩ

0.1%

10 kΩ

0.1%

−

V

CC−

V

CC−

Figure 19. Instrumentation Amplifier

R

= 100 kΩ

V

−

F

CC+

15 V

TL061

R1

3.3 kΩ

+

Output

Input

−

Output

R2

TL061

+

C3

V

CC−

1 kΩ

C

= 3.3 µF

F

−15 V

R1 = R2 = 2 × R3 = 1.5 MΩ

R3

C2

C1

C3

2

1

3.3 kΩ

C1 + C2 +

+ 110 pF

1

9.1 kΩ

f +

2p R_F C_F

f_o

+

+ 1 kHz

2p R1 C1

Figure 20. 0.5-Hz Square-Wave Oscillator

Figure 21. High-Q Notch Filter

16

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢆꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢈꢅ ꢀꢁ ꢂꢃ ꢈꢆ

ꢀ ꢁꢂ ꢃ ꢈ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢉꢇ

ꢁ ꢊꢋꢌꢍꢊ ꢋ ꢎꢏ ꢐ ꢑ ꢎꢀꢌꢒ ꢓꢍꢔꢀ ꢊ ꢍꢎꢏ ꢆꢀ ꢒꢊ ꢓꢆꢁ ꢆꢕ ꢍ ꢁꢒ ꢑꢒ ꢎꢏ ꢖ

SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

APPLICATION INFORMATION

V

CC+

−

1 MΩ

Output A

Output B

Output C

TL064

V

+

CC+

−

V

1 µF

−

TL064

+

Input

TL064

+

100 kΩ

V

CC+

V

−

100 µF

100 kΩ

TL064

+

Figure 22. Audio-Distribution Amplifier

15 V

10 kΩ

+

TIL601

100 pF

Output

TL061

10 kΩ

−

10 kΩ

5 kΩ

−15 V

Figure 23. Low-Level Light Detector Preamplifier

17

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢎ

ꢃ

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ꢆ

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ꢀ

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ꢌ

ꢃ

ꢉ

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ꢍ

ꢇ

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ꢍ

ꢃ

ꢉ

ꢈ

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ꢎ

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ꢀ

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ꢃ

ꢈ

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ꢉ

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ꢁ

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ꢍ

ꢁ

ꢒ

ꢑ

ꢒ

ꢎ

ꢏ

ꢖ

SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

APPLICATION INFORMATION

V

CC+

0.1 µF

10 kΩ

1 MΩ

−

TL061

+

Output

50 Ω

N2

N1

10 kΩ

0.1 µF

250 kΩ

Figure 24. AC Amplifier

10 kΩ

100 kΩ

1 kΩ

0.06 µF

0.1 µF

47 kΩ

0.06 µF

1 µF

+

TL061

−

10 kΩ

0.002 µF

1.2 MΩ

100 kΩ

50 kΩ

2.7 kΩ

10 kΩ

100 kΩ

0.003 µF 0.001 µF

100 kΩ

270 Ω

+

50 kΩ

0.02 µF

20 µF

Figure 25. Microphone Preamplifier With Tone Control

IN+

+

TL062

−

Output

100 kΩ

1 kΩ

100 kΩ

−

TL062

+

IN−

Figure 26. Instrumentation Amplifier

18

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢆꢅ ꢀ ꢁꢂ ꢃ ꢄ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢈꢅ ꢀꢁ ꢂꢃ ꢈꢆ

ꢀ ꢁꢂ ꢃ ꢈ ꢇꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢅ ꢀ ꢁꢂ ꢃ ꢉ ꢆ ꢅ ꢀꢁ ꢂꢃ ꢉꢇ

ꢁ ꢊꢋꢌꢍꢊ ꢋ ꢎꢏ ꢐ ꢑ ꢎꢀꢌꢒ ꢓꢍꢔꢀ ꢊ ꢍꢎꢏ ꢆꢀ ꢒꢊ ꢓꢆꢁ ꢆꢕ ꢍ ꢁꢒ ꢑꢒ ꢎꢏ ꢖ

SLOS078J − NOVEMBER 1978 − REVISED SEPTEMBER 2004

APPLICATION INFORMATION

IC PREAMPLIFIER RESPONSE CHARACTERISTICS

25

Max Bass

Max

Treble

20

V

T

A

=

15 V

CC

15

10

= 25°C

5

0

−5

−10

−15

−20

−25

Min

Treble

Min Bass

20 40 100 200 400

1 k 2 k 4 k 10 k 20 k

f − Frequency − Hz

220 kΩ

0.00375 µF

0.01 µF

0.003 µF

10 kΩ

0.03 µF

27 kΩ

MIN

100 kΩ

Treble

100 kΩ

Bass

MAX

V

CC+

V

CC+

10 kΩ 3.3 kΩ

MAX

+

100 Ω

Input

1 µF

TL062

−

TL062

−

Output

V

CC−

V

CC−

0.003 µF

100 Ω

10 kΩ

Balance

10 pF

+

75 µF

5 kΩ

Gain

47 kΩ

+

68 kΩ

50 pF

47 µF

Figure 27. IC Preamplifier

19

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

6-Dec-2006

PACKAGING INFORMATION

Orderable Device

Status ⁽¹⁾

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

LCCC

CFP

Drawing

81023012A

81023022A

8102302HA

8102302PA

81023032A

8102303CA

8102303DA

TL061ACD

OBSOLETE

ACTIVE

FK

U

20

10

8

TBD

Call TI

1

POST-PLATE N / A for Pkg Type

A42 SNPB

N / A for Pkg Type

CDIP

LCCC

CDIP

CFP

JG

FK

J

20

14

8

POST-PLATE N / A for Pkg Type

A42 SNPB

N / A for Pkg Type

W

D

SOIC

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL061ACDE4

TL061ACDR

ACTIVE

SOIC

PDIP

SO

D

8

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL061ACDRE4

TL061ACP

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

P

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

TL061ACPE4

TL061ACPSR

TL061ACPSRE4

P

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

PS

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SO

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL061BCD

TL061BCP

OBSOLETE

ACTIVE

SOIC

PDIP

D

P

8

TBD

Call TI

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

TL061BCPE4

TL061CD

ACTIVE

PDIP

SOIC

PDIP

SO

P

D

8

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL061CDE4

TL061CDR

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL061CDRE4

TL061CP

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

P

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

TL061CPE4

TL061CPSR

TL061CPSRE4

P

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

PS

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SO

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL061CPWLE

TL061ID

OBSOLETE TSSOP

PW

D

8

TBD

Call TI

ACTIVE

SOIC

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL061IDE4

ACTIVE

SOIC

D

8

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

6-Dec-2006

Orderable Device

Status ⁽¹⁾

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

no Sb/Br)

TL061IDR

TL061IDRE4

TL061IP

ACTIVE

SOIC

PDIP

D

P

8

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

TL061IPE4

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

TL061MJG

TL061MJGB

TL062ACD

OBSOLETE

ACTIVE

CDIP

SOIC

JG

D

8

TBD

Call TI

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL062ACDE4

TL062ACDR

ACTIVE

SOIC

D

8

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL062ACDRE4

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL062ACJG

TL062ACP

OBSOLETE

ACTIVE

CDIP

PDIP

JG

P

8

TBD

Call TI

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

TL062ACPE4

TL062ACPSR

TL062ACPSRE4

TL062BCD

ACTIVE

PDIP

SO

P

PS

D

8

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SO

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SOIC

PDIP

SOIC

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL062BCDE4

TL062BCDR

TL062BCDRE4

TL062BCP

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

P

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

TL062BCPE4

TL062CD

P

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL062CDE4

TL062CDG4

TL062CDR

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL062CDRE4

TL062CDRG4

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

6-Dec-2006

Orderable Device

Status ⁽¹⁾

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

no Sb/Br)

TL062CJG

TL062CP

OBSOLETE

ACTIVE

CDIP

PDIP

JG

P

8

TBD

Call TI

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

TL062CPE4

ACTIVE

PDIP

P

8

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

TL062CPSLE

TL062CPSR

OBSOLETE

ACTIVE

SO

PS

8

TBD

Call TI

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL062CPSRE4

TL062CPW

ACTIVE

SO

PS

PW

8

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TSSOP

150 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL062CPWE4

150 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL062CPWLE

TL062CPWR

OBSOLETE TSSOP

PW

8

TBD

Call TI

ACTIVE

TSSOP

SOIC

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL062CPWRE4

TL062CPWRG4

TL062ID

PW

D

8

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL062IDE4

SOIC

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL062IDG4

TL062IDR

SOIC

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL062IDRE4

TL062IDRG4

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL062IJG

TL062IP

OBSOLETE

ACTIVE

CDIP

PDIP

JG

P

8

TBD

Call TI

50

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

TL062IPE4

TL062IPWR

TL062IPWRE4

ACTIVE

PDIP

P

8

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

TSSOP

PW

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL062MFKB

TL062MJG

TL062MJGB

TL064ACD

ACTIVE

LCCC

CDIP

SOIC

FK

JG

D

20

8

1

TBD

POST-PLATE N / A for Pkg Type

A42 SNPB

N / A for Pkg Type

8

14

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL064ACDE4

ACTIVE

SOIC

D

14

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

Addendum-Page 3

PACKAGE OPTION ADDENDUM

www.ti.com

6-Dec-2006

Orderable Device

TL064ACDR

TL064ACDRE4

TL064ACN

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SOIC

D

14

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SOIC

PDIP

SOIC

PDIP

SOIC

SSOP

SOIC

PDIP

SO

D

N

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

25

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

TL064ACNE4

TL064BCD

N

25

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

D

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL064BCDE4

TL064BCDR

TL064BCDRE4

TL064BCN

D

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

N

25

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

TL064BCNE4

TL064CD

N

25

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

D

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL064CDBR

TL064CDBRE4

TL064CDE4

TL064CDR

DB

D

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL064CDRE4

TL064CN

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

N

25

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

TL064CNE4

TL064CNSR

TL064CNSRE4

TL064CPW

N

25

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

NS

PW

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SO

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TSSOP

90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL064CPWE4

90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL064CPWLE

TL064CPWR

OBSOLETE TSSOP

PW

14

TBD

Call TI

ACTIVE

TSSOP

SOIC

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL064CPWRE4

TL064ID

PW

D

14

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

Addendum-Page 4

PACKAGE OPTION ADDENDUM

www.ti.com

6-Dec-2006

Orderable Device

TL064IDE4

TL064IDG4

TL064IDR

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SOIC

D

14

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SOIC

PDIP

SO

D

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL064IDRE4

TL064IDRG4

TL064IN

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

N

25

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

TL064INE4

TL064INS

N

25

Pb-Free

(RoHS)

CU NIPDAU N / A for Pkg Type

NS

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL064INSG4

TL064INSR

TL064INSRG4

SO

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SO

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SO

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TL064MFK

TL064MFKB

TL064MJ

ACTIVE

LCCC

CDIP

CFP

FK

J

20

14

1

TBD

POST-PLATE N / A for Pkg Type

A42 SNPB

N / A for Pkg Type

TL064MJB

TL064MWB

J

W

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

Addendum-Page 5

PACKAGE OPTION ADDENDUM

www.ti.com

6-Dec-2006

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 6

MECHANICAL DATA

MCER001A – JANUARY 1995 – REVISED JANUARY 1997

JG (R-GDIP-T8)

CERAMIC DUAL-IN-LINE

0.400 (10,16)

0.355 (9,00)

8

5

0.280 (7,11)

0.245 (6,22)

1

4

0.065 (1,65)

0.045 (1,14)

0.310 (7,87)

0.290 (7,37)

0.063 (1,60)

0.015 (0,38)

0.020 (0,51) MIN

0.200 (5,08) MAX

0.130 (3,30) MIN

Seating Plane

0.023 (0,58)

0.015 (0,38)

0°–15°

0.100 (2,54)

0.014 (0,36)

0.008 (0,20)

4040107/C 08/96

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. This package can be hermetically sealed with a ceramic lid using glass frit.

D. Index point is provided on cap for terminal identification.

E. Falls within MIL STD 1835 GDIP1-T8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MLCC006B – OCTOBER 1996

FK (S-CQCC-N**)

LEADLESS CERAMIC CHIP CARRIER

28 TERMINAL SHOWN

A

B

NO. OF

TERMINALS

**

18 17 16 15 14 13 12

MIN

MAX

MIN

MAX

0.342

(8,69)

0.358

(9,09)

0.307

(7,80)

0.358

(9,09)

19

20

11

10

9

20

28

44

52

68

84

0.442

(11,23)

0.458

(11,63)

0.406

(10,31)

0.458

(11,63)

21

B SQ

22

0.640

(16,26)

0.660

(16,76)

0.495

(12,58)

0.560

(14,22)

8

A SQ

23

0.739

(18,78)

0.761

(19,32)

0.495

(12,58)

0.560

(14,22)

7

24

25

6

0.938

(23,83)

0.962

(24,43)

0.850

(21,6)

0.858

(21,8)

5

1.141

(28,99)

1.165

(29,59)

1.047

(26,6)

1.063

(27,0)

26 27 28

1

2

3

4

0.080 (2,03)

0.064 (1,63)

0.020 (0,51)

0.010 (0,25)

0.020 (0,51)

0.010 (0,25)

0.055 (1,40)

0.045 (1,14)

0.035 (0,89)

0.045 (1,14)

0.035 (0,89)

0.028 (0,71)

0.022 (0,54)

0.050 (1,27)

4040140/D 10/96

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. This package can be hermetically sealed with a metal lid.

D. The terminals are gold plated.

E. Falls within JEDEC MS-004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MPDI001A – JANUARY 1995 – REVISED JUNE 1999

P (R-PDIP-T8)

PLASTIC DUAL-IN-LINE

0.400 (10,60)

0.355 (9,02)

8

5

0.260 (6,60)

0.240 (6,10)

1

4

0.070 (1,78) MAX

0.325 (8,26)

0.300 (7,62)

0.020 (0,51) MIN

0.015 (0,38)

Gage Plane

0.200 (5,08) MAX

Seating Plane

0.010 (0,25) NOM

0.125 (3,18) MIN

0.100 (2,54)

0.021 (0,53)

0.430 (10,92)

MAX

0.010 (0,25)

M

0.015 (0,38)

4040082/D 05/98

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Falls within JEDEC MS-001

For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001

DB (R-PDSO-G**)

PLASTIC SMALL-OUTLINE

28 PINS SHOWN

0,38

0,22

0,65

28

M

0,15

15

0,25

0,09

5,60

5,00

8,20

7,40

Gage Plane

1

14

0,25

A

0°–ā8°

0,95

0,55

Seating Plane

0,10

2,00 MAX

0,05 MIN

PINS **

14

16

20

24

28

30

38

DIM

6,50

5,90

6,50

5,90

7,50

8,50

7,90

10,50

9,90

10,50 12,90

A MAX

A MIN

6,90

9,90

12,30

4040065 /E 12/01

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-150

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**)

PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,30

0,19

M

0,10

0,65

14

8

0,15 NOM

4,50

4,30

6,60

6,20

Gage Plane

0,25

1

7

0°–8°

A

0,75

0,50

Seating Plane

0,10

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