欢迎访问ic37.com |
会员登录 免费注册
发布采购
所在地: 型号: 精确
  • 批量询价
  •  
  • 供应商
  • 型号
  • 数量
  • 厂商
  • 封装
  • 批号
  • 交易说明
  • 询价
  •  
  • 北京元坤伟业科技有限公司

         该会员已使用本站17年以上

  • TMDS1MTRPFCKIT
  • 数量-
  • 厂家-
  • 封装-
  • 批号-
  • -
  • QQ:857273081QQ:857273081 复制
    QQ:1594462451QQ:1594462451 复制
  • 010-62104931、62106431、62104891、62104791 QQ:857273081QQ:1594462451
更多
  • TMDS1MTRPFCKIT图
  • HECC GROUP CO.,LIMITED

     该会员已使用本站17年以上
  • TMDS1MTRPFCKIT 现货库存
  • 数量880 
  • 厂家TI 
  • 封装代理 
  • 批号24+ 
  • 假一罚万,原厂原装有COC,长期有订货
  • QQ:800888908QQ:800888908 复制
  • 755-83950019 QQ:800888908
  • TMDS1MTRPFCKIT图
  • 深圳市芯福林电子有限公司

     该会员已使用本站15年以上
  • TMDS1MTRPFCKIT
  • 数量65000 
  • 厂家TI 
  • 封装TEJIA 
  • 批号23+ 
  • 真实库存全新原装正品!代理此型号
  • QQ:2881495753QQ:2881495753 复制
  • 0755-23605827 QQ:2881495753
  • TMDS1MTRPFCKIT图
  • 深圳市宏世佳电子科技有限公司

     该会员已使用本站13年以上
  • TMDS1MTRPFCKIT
  • 数量612 
  • 厂家TI 
  • 封装编程器 
  • 批号2023+ 
  • 全新原厂原装产品、公司现货销售
  • QQ:2881894392QQ:2881894392 复制
    QQ:2881894393QQ:2881894393 复制
  • 0755- QQ:2881894392QQ:2881894393
  • TMDS1MTRPFCKIT图
  • 昂富(深圳)电子科技有限公司

     该会员已使用本站4年以上
  • TMDS1MTRPFCKIT
  • 数量53516 
  • 厂家TI/德州仪器 
  • 封装NA 
  • 批号23+ 
  • 一站式BOM配单,短缺料找现货,怕受骗,就找昂富电子.
  • QQ:GTY82dX7
  • 0755-23611557【陈妙华 QQ:GTY82dX7
  • TMDS1MTRPFCKIT图
  • 深圳市正信鑫科技有限公司

     该会员已使用本站12年以上
  • TMDS1MTRPFCKIT
  • 数量3002 
  • 厂家TI 
  • 封装原厂封装 
  • 批号22+ 
  • 原装正品★真实库存★价格优势★欢迎来电洽谈
  • QQ:1686616797QQ:1686616797 复制
    QQ:2440138151QQ:2440138151 复制
  • 0755-22655674 QQ:1686616797QQ:2440138151
  • TMDS1MTRPFCKIT图
  • 深圳市芯柏然科技有限公司

     该会员已使用本站7年以上
  • TMDS1MTRPFCKIT
  • 数量23480 
  • 厂家TI 
  • 封装 
  • 批号21+ 
  • 新到现货、一手货源、当天发货、价格低于市场
  • QQ:287673858QQ:287673858 复制
  • 0755-82533534 QQ:287673858
  • TMDS1MTRPFCKIT图
  • 万三科技(深圳)有限公司

     该会员已使用本站2年以上
  • TMDS1MTRPFCKIT
  • 数量6500000 
  • 厂家Texas Instruments 
  • 封装原厂原装 
  • 批号22+ 
  • 万三科技 秉承原装 实单可议
  • QQ:3008961396QQ:3008961396 复制
  • 0755-21008751 QQ:3008961396
  • TMDS1MTRPFCKIT图
  • 麦尔集团

     该会员已使用本站10年以上
  • TMDS1MTRPFCKIT
  • 数量600 
  • 厂家TI 
  • 封装十五周年庆典 
  • 批号17+ 
  • TI全线优势订货
  • QQ:1716771758QQ:1716771758 复制
    QQ:2574148071QQ:2574148071 复制
  • 88266576 QQ:1716771758QQ:2574148071

产品型号TMDS250的Datasheet PDF文件预览

TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
2.5 Gbps 2-TO-1 DVI/HDMI SWITCH  
1
FEATURES  
3.3-V Fixed Supply to TMDS I/Os  
5-V Fixed Supply to HPD, DDC, and Source  
Compatible with HDMI 1.3a  
Selection Circuits  
Supports 2.5 Gbps Signaling Rate for 480i/p,  
720i/p, and 1080i/p Resolutions up to 12-Bit  
Color Depth  
64-Pin TQFP Package  
Footprint Compatible with 3-to-1 Switch  
TMDS351 with Port 1 Disabled  
Integrated Switchable Receiver Termination  
Selectable Receiver Equalization to  
Accommodate to Different Input Cable  
Lengths  
ROHS Compatible and 260°C Reflow Rated  
TMDS251 is Available with Port 3 Disabled and  
Ports 1 and 2 Enabled  
Intra-Pair Skew < 40 ps  
Inter-Pair Skew < 65 ps  
Supports 5-V to 3.3-V Level Shifting on DDC  
Links  
HBM ESD Protection Exceeds 8 kV to TMDS  
Inputs  
APPLICATIONS  
Digital TV  
Digital Projector  
DESCRIPTION  
The TMDS250 is a 2-port digital video interface (DVI) or high-definition multimedia interface (HDMI) switch that  
allows up to 2 DVI or HDMI ports to be switched to a single display terminal. Four TMDS channels, one hot plug  
detector, and a digital display control (DDC) interface are supported on each port. Each TMDS channel supports  
signaling rates up to 2.5 Gbps to allow 1080p resolution in 12-bit color depth.  
The input port is enabled by configuring source selectors, S1 and S2. When an input port is selected, the TMDS  
inputs are connected to the TMDS outputs through a 2-to-1 multiplexer, the MOSFET between the input DDC  
channel and the output DDC channel is turned on, and the HPD output follows the state of the HPD_SINK. The  
other input port is inactive with disconnected input terminations, disconnected TMDS inputs to the outputs,  
disconnected DDC inputs to the outputs, and the HPD outputs are low state. Check the source selection look up  
table for the details of port selections.  
When S1 is high and S2 is low, all input terminations are disconnected, TMDS inputs are high impedance with  
standard TMDS terminations, all internal MOSFETs are turned off to disable the DDC links, and all HPD outputs  
are connected to the HPD_SINK. This allows the initiation of the HDMI physical address discovery process.  
Termination resistors (50-), pulled up to VCC, are integrated at each TMDS receiver input. External terminations  
are not required. A precision resistor is connected externally from the VSADJ pin to ground for setting the  
differential output voltage to be compliant with the TMDS standard.  
Typical Application  
DVD Player  
Digital TV  
STB  
TMDS250  
2-to-1  
PHY SX  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2007, Texas Instruments Incorporated  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
The TMDS250 provides two levels of receiver input equalization for different ranges of cable lengths. Each  
TMDS receiver owns frequency responsive equalization circuits. When EQ sets low, the receiver supports the  
input connection in short range HDMI cables. When EQ sets high, the receiver supports the input connection in  
long range HDMI cables. The TMDS250 supports power saving operation. When a system is under standby  
mode and there is no digital audio/visual content from a connected source, the 3.3-V supply voltage, VCC, can be  
powered off to minimize power consumption from the TMDS inputs, outputs, and internal switching circuits. The  
HPD, DDC, and source selection circuits are powered up by the 5-V supply voltage, VDD, to maintain the system  
hot plug detect response, the DDC link from the selected source to the sink under system standby operation. The  
device is characterized for operation from 0°C to 70°C.  
2
Submit Documentation Feedback  
Copyright © 2007, Texas Instruments Incorporated  
Product Folder Link(s): TMDS250  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
FUNCTIONAL BLOCK DIAGRAM  
EQ  
Vcc  
RINT RINT  
A14  
B14  
Y4  
Z4  
2-to-1  
MUX  
TMDS  
Rx  
TMDS  
Driver  
Vcc  
RINT RINT  
A13  
B13  
TMDS  
Rx  
Y3  
Z3  
Vcc  
TMDS  
Driver  
RINT RINT  
A12  
B12  
TMDS  
Rx  
Vcc  
Y2  
Z2  
RINT RINT  
TMDS  
Driver  
A11  
B11  
TMDS  
Rx  
Vcc  
Y1  
RINT RINT  
TMDS  
Driver  
A24  
B24  
TMDS  
Rx  
Z1  
Vcc  
VSADJ  
RINT RINT  
A23  
B23  
TMDS  
Rx  
Vcc  
RINT RINT  
A22  
B22  
TMDS  
Rx  
Vcc  
RINT RINT  
A21  
B21  
TMDS  
Rx  
S1  
S2  
HPD1  
HPD2  
Control  
Logic  
HPD_SINK  
SCL1  
SDA1  
SCL_SINK  
SDA_SINK  
SCL2  
SDA2  
HPD/DDC  
Power Supply  
V
DD  
Copyright © 2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
3
Product Folder Link(s): TMDS250  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
PAG PACKAGE  
(TOP VIEW)  
1
2
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
NC  
SDA2  
SCL2  
GND  
B21  
NC  
Vcc  
NC  
3
4
5
NC  
A21  
6
GND  
NC  
Vcc  
TMDS250  
7
B22  
8
NC  
Vcc  
NC  
A22  
64-pin TQFP  
9
GND  
B23  
10  
11  
12  
13  
14  
15  
16  
A23  
Vcc  
NC  
NC  
NC  
NC  
EQ  
S2  
B24  
A24  
GND  
VSADJ  
4
Submit Documentation Feedback  
Copyright © 2007, Texas Instruments Incorporated  
Product Folder Link(s): TMDS250  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
TERMINAL FUNCTIONS  
TERMINAL  
I/O  
DESCRIPTION  
NAME  
NO.  
A11, A12, A13, A14  
A21, A22, A23, A24  
B11, B12, B13, B14  
B21, B22, B23, B24  
Y1, Y2, Y3, Y4  
Z1, Z2, Z3, Z4  
SCL1  
54, 57, 60, 63  
I
I
Source port 1 TMDS positive inputs  
Source port 2 TMDS positive inputs  
Source port 1 TMDS negative inputs  
Source port 2 TMDS negative inputs  
Sink port TMDS positive outputs  
Sink port TMDS negative outputs  
Source port 1 DDC I2C clock line  
Source port 1 DDC I2C data line  
Source port 2 DDC I2C clock line  
Source port 2 DDC I2C data line  
Sink port DDC I2C clock line  
5, 8, 11, 14  
53, 56, 59, 62  
I
4, 7, 10, 13  
I
26, 23, 20, 17  
O
O
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
O
O
I
27, 24, 21, 18  
52  
51  
SDA1  
SCL2  
2
SDA2  
1
SCL_SINK  
SDA_SINK  
HPD1  
29  
30  
Sink port DDC I2C data line  
50  
Source port 1 hot plug detector output (status pin)  
Source port 2 hot plug detector output (status pin)  
Sink port hot plug detector input (status pin)  
Source selector  
HPD2  
64  
HPD_SINK  
S1, S2  
31  
32, 33  
I
TMDS Input equalization selector (control pin)  
EQ = Low – HDMI 1.3 compliant cable  
EQ = High – 10m 28 AWG HDMI cable  
EQ  
34  
I
I
VSADJ  
VDD  
16  
49  
TMDS compliant voltage swing control (control pin)  
HPD/DDC Power supply  
6, 12, 19, 25, 40,  
46, 55, 61  
VCC  
GND  
NC  
Power supply  
3, 9, 15, 22, 28,  
43, 58  
Ground  
35-39, 41, 42, 44,  
45, 47, 48  
No connect: these pins should be left floating  
Table 1. Source Selection Lookup(1)  
CONTROL BITS  
I/O SELECTED  
HOT PLUG DETECT STATUS  
SCL_SINK  
SDA_SINK  
S1  
S2  
Y/Z  
HPD1  
HPD2  
A1/B1  
SCL1  
SDA1  
L
H
L
Terminations of A2/B2 are  
HPD_SINK  
L
disconnected  
A2/B2  
SCL2  
SDA2  
L
H
H
Terminations of A1/B1 are  
disconnected  
L
HPD_SINK  
L
Disallowed (indeterminate)  
State  
H
L
L
None (Z)  
Are pulled HIGH by  
external pull-up  
termination  
All terminations are  
disconnected  
None (Z)  
All terminations are  
disconnected  
HPD_SINK  
HPD_SINK  
(1) H: Logic high; L: Logic low; X: Don't care; Z: High impedance  
Copyright © 2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
5
Product Folder Link(s): TMDS250  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS  
TMDS Input Stage  
TMDS Output Stage  
V
CC  
V
CC  
Y
Z
50 W  
50 W  
A
B
10 mA  
Control Input Stage  
Status and Source Selector  
V
V
DD  
CC  
HPD_SINK  
EQ  
S1  
S2  
DDC Pass Gate  
HPD Output Stage  
V
DD  
V
DD  
SCL/SDA  
Sink  
SCL/SDA  
Source  
HPD1  
HPD2  
6
Submit Documentation Feedback  
Copyright © 2007, Texas Instruments Incorporated  
Product Folder Link(s): TMDS250  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
ORDERING INFORMATION(1)  
PART NUMBER  
TMDS250PAGR  
PART MARKING  
PACKAGE  
64-PIN TQFP Tape/Reel  
TMDS250  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
web site at www.ti.com.  
ABSOLUTE MAXIMUM RATINGS  
over operating free-air temperature range (unless otherwise noted)(1)  
UNIT  
Supply voltage  
range(2)  
VCC  
–0.5 V to 4 V  
–0.5 V to 6 V  
2.5 V to 4 V  
–0.5V to 4 V  
–0.5 V to 6 V  
±8000 V  
VDD  
Anm(3), Bnm  
Voltage range  
Ym, Zm, VSADJ, EQ  
SCLn, SCL_SINK, SDAn, SDA_SINK, HPDn, HPD_SINK, S1, S2  
Anm, Bnm, Ym, Zm  
All pins  
Human body model(4)  
±4000 V  
Electrostatic  
discharge  
Charged-device model(5) (all pins)  
Machine model (6) (all pins)  
±1500 V  
±200 V  
See Dissipation Rating  
Table  
Continuous power dissipation  
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings  
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating  
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.  
(3) n = 1, 2; m = 1, 2, 3, 4  
(4) Tested in accordance with JEDEC Standard 22, Test Method A114-B  
(5) Tested in accordance with JEDEC Standard 22, Test Method C101-A  
(6) Tested in accordance with JEDEC Standard 22, Test Method A115-A  
DISSIPATION RATINGS  
(1)  
PCB JEDEC  
STANDARD  
DERATING FACTOR  
TA = 70°C  
POWER RATING  
PACKAGE  
TA 25°C  
ABOVE TA = 25°C  
Low-K  
High-K  
1111 mW  
1492 mW  
11.19 mW/°C  
611 mW  
820 mW  
64-TQFP PAG  
14.92  
(1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.  
THERMAL CHARACTERISTICS  
over operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP MAX(1)  
UNIT  
RθJB Junction-to-board thermal  
resistance  
33.4  
°C/W  
°C/W  
RθJC Junction- to-case thermal  
resistance  
15.6  
VIH = VCC, VIL = VCC - 0.6 V, RT = 50 , AVCC = 3.3V,  
Am/Bm(2:4) = 2.5-Gbps HDMI data pattern,  
Am/Bm(1) = 250-MHz clock  
PD  
Device power dissipation  
590  
750  
mW  
(1) The maximum rating is simulation under 3.6-V VCC, 5.5-V VDD, and 600 mV VID  
.
RECOMMENDED OPERATING CONDITIONS  
MIN NOM  
MAX  
3.6  
UNIT  
V
VCC  
VDD  
Supply voltage  
3
3.3  
5
Standby supply voltage  
4.5  
5.5  
V
Copyright © 2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
7
Product Folder Link(s): TMDS250  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
RECOMMENDED OPERATING CONDITIONS (continued)  
MIN NOM  
MAX  
70  
UNIT  
°C  
TA  
Operating free-air temperature  
0
TMDS DIFFERENTIAL PINS  
VIC  
Input common mode voltage  
VCC–0.4  
VCC+0.01  
V
VID  
Receiver peak-to-peak differential input voltage  
Resistor for TMDS compliant voltage swing range  
TMDS output termination voltage, see Figure 1  
Termination resistance, see Figure 1  
Signaling rate  
150  
3.66  
3
1560 mVp-p  
RVSADJ  
AVCC  
RT  
4.02  
3.3  
50  
4.47  
3.6  
55  
kΩ  
V
45  
0
2.5  
Gbps  
CONTROL PINS  
VIH  
VIL  
LVTTL High-level input voltage  
LVTTL Low-level input voltage  
2
VCC  
0.8  
V
V
GND  
DDC I/O PINS  
VI(DDC)  
DDC Input voltage  
GND  
VDD  
V
STATUS and SOURCE SELECTOR PINS  
VIH  
VIL  
LVTTL High-level input voltage  
LVTTL Low-level input voltage  
2
VDD  
0.8  
V
V
GND  
ELECTRICAL CHARACTERISTICS  
over recommended operating conditions (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN TYP(1)  
MAX  
UNIT  
VIH = VCC, VIL = VCC – 0.6 V,  
RT = 50 , AVCC = 3.3 V  
Am/Bm(2:4) = 2.5 Gbps HDMI data  
pattern  
S1/S2 =  
Low/Low,  
Low/High,  
High/High  
176  
200  
20  
5
ICC  
Supply current  
mA  
Am/Bm(1) = 250 MHz clock  
S1/S2 =  
High/Low  
8
2
VIH = VCC, VIL = VCC – 0.6 V,  
RT = 50 , AVCC = 3.3 V  
Am/Bm(2:4) = 2.5 Gbps HDMI data pattern  
Am/Bm(1) = 250 MHz clock  
IDD  
Power supply current, 5-V  
mA  
TMDS DIFFERENTIAL PINS  
VOH  
Single-ended high-level output voltage  
AVCC–10  
AVCC+10  
AVCC–400  
600  
mV  
mV  
mV  
VOL  
Single-ended low-level output voltage  
Single-ended output swing voltage  
Overshoot of output differential voltage  
Undershoot of output differential voltage  
AVCC–600  
400  
Vswing  
VOD(O)  
VOD(U)  
See Figure 2, AVCC = 3.3 V,  
RT = 50 Ω  
15% 2× Vswing  
25% 2× Vswing  
Change in steady-state common-mode  
output voltage between logic states  
ΔVOC(SS)  
I(OS)  
VI(open)  
RINT  
5
12  
mV  
mA  
mV  
Short circuit output current  
See Figure 3  
II = 10 µA  
-12  
VCC–10  
45  
Single-ended input voltage under high  
impedance input or open input  
VCC+10  
55  
Input termination resistance  
VIN = 2.9 V  
50  
CONTROL PINS  
IIH  
IIL  
High-level digital input current(2)  
Low-level digital input current(2)  
VIH = 2 V or VCC  
-10  
-10  
10  
10  
µA  
µA  
VIL = GND or 0.8 V  
DDC I/O PINS  
Ilkg  
Input leakage current  
VI = 0.1 VDD to 0.9 VDD to isolated DDC inputs  
VI(pp) = 1 V, 100 kHz  
-10  
2.4  
10  
10  
µA  
pF  
CIO  
Input/output capacitance  
Switch resistance  
RON  
VPASS  
IO = 3 mA, VO = 0.4 V  
27  
40  
Switch output voltage  
VI = 5 V, IO = 100 µA  
2.7  
V
STATUS AND SOURCE SELECTOR PINS  
(1) All typical values are at 25°C and with a 3.3-V supply.  
(2) IIH and IIL specifications are not applicable to the VSADJ pin.  
8
Submit Documentation Feedback  
Copyright © 2007, Texas Instruments Incorporated  
Product Folder Link(s): TMDS250  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
ELECTRICAL CHARACTERISTICS (continued)  
over recommended operating conditions (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN TYP(1)  
MAX  
10  
UNIT  
µA  
µA  
V
IIH  
High-level digital input current  
Low-level digital input current  
TTL High-level output voltage  
TTL Low-level output voltage  
VIH = 2 V or VDD  
VIL = GND or 0.8 V  
IOH = –100 μA  
-10  
-10  
IIL  
10  
VOH  
VOL  
2.4  
VDD  
0.4  
IOL = 100 μA  
GND  
V
SWITCHING CHARACTERISTICS(1)  
over recommended operating conditions (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP(2) MAX UNIT  
TMDS DIFFERENTIAL PINS (Y/Z)  
tPLH  
tPHL  
tr  
Propagation delay time, low-to-high-level output  
Propagation delay time, high-to-low-level output  
Differential output signal rise time (20% - 80%)  
Differential output signal fall time (20% - 80%)  
Pulse skew (|tPHL – tPLH|)(3)  
400  
400  
60  
650  
650  
80  
80  
6
900  
900  
140  
140  
20  
ps  
ps  
ps  
ps  
ps  
ps  
ps  
ps  
ps  
tf  
60  
See Figure 2, AVCC = 3.3 V,  
RT = 50 Ω  
tsk(p)  
tsk(D)  
tsk(o)  
tsk(pp)  
tjit(pp)  
Intra-pair differential skew, see Figure 4  
Inter-pair channel-to-channel output skew(4)  
20  
30  
40  
65  
(5)  
Part-to-part skew  
510  
20  
Peak-to-peak output jitter from Yj/Zj(1) residual jitter  
Peak-to-peak output jitter from Yj/Zj(2:4) residual jitter  
See Figure 5,  
Am/Bm(1) = 250 MHz clock,  
Am/Bm(2:4) = 2.5 Gbps HDMI pattern  
8
tjit(pp)  
60  
80  
ps  
tSX  
ten  
tdis  
Select to switch output  
Enable time  
50  
170  
9
70  
200  
15  
ns  
ns  
ns  
See Figure 6,  
10-mA Current source to the input  
Disable time  
Propagation delay from SCLn to SCL_SINK or SDAn to  
SDA_SINK or SDA_SINK to SDAn  
tpd(DDC)  
8
15  
ns  
tsx(DDC)  
tpd(HPD)  
tsx(HPD)  
Switch time from SCLn to SCL_SINK  
8
14  
33  
15  
20  
50  
ns  
ns  
ns  
See Figure 7, CL = 10 pF  
Propagation delay (from HPD_SINK to the active port of HPD)  
Switch time from port select to the latest valid status of HPD  
(1) Measurements are made with the Agilent 81250 ParBert System with a N4872A generator (600 fs tJIT(CLK), 13 ps tJIT(pp)) and a N4873A  
analyzer.  
(2) All typical values are at 25°C and with a 3.3-V supply.  
(3) tsk(p) is the magnitude of the time difference between tPLH and tPHL of a specified terminal.  
(4) tsk(o) is the magnitude of the difference in propagation delay times between any specified terminals of a sink-port bank when inputs of  
the active source port are tied together.  
(5) tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices  
operate with the same source, the same supply voltages, at the same temperature, and have identical packages and test circuits.  
Copyright © 2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
9
Product Folder Link(s): TMDS250  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
PARAMETER MEASUREMENT INFORMATION  
AVcc  
R
R
T
T
Z
Z
= R  
= R  
O
O
T
TMDS  
Driver  
TMDS  
Receiver  
T
Figure 1. Termination for TMDS Output Driver  
Vcc  
R
R
INT  
A
INT  
R
T
Y
TMDS  
Receiver  
TMDS  
Driver  
C
AVcc  
L
V
ID  
R
T
V
V
0.5 pF  
A
Y
B
V
Z
V
V
B
Z
V
V
=
V
=
V
V
Z
A
B
swing  
Y
ID  
DC Coupled AC Coupled  
Vcc  
Vcc+0.2 V  
V
A
V
B
Vcc−0.4 V  
0.4 V  
Vcc−0.2 V  
V
ID  
V
ID  
V
ID(pp)  
0 V  
−0.4 V  
t
t
PHL  
PLH  
100%  
80%  
V
swing  
V
OD(O)  
0V Differential  
0%  
V
OD(pp)  
20%  
V
t
t
f
r
OD(U)  
V
OC  
n
V
OC(SS)  
NOTE: All input pulses are supplied by a generator having the following characteristics: tr or tf < 100 ps, 100 MHz from  
Agilent 81250. CL includes instrumentation and fixture capacitance within 0.06 m of the D.U.T. Measurement  
equipment provides a bandwidth of 20 GHz minimum.  
Figure 2. TMDS Input, Output, and Timing Definitions  
10  
Submit Documentation Feedback  
Copyright © 2007, Texas Instruments Incorporated  
Product Folder Link(s): TMDS250  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
PARAMETER MEASUREMENT INFORMATION (continued)  
50 W  
I
OS  
TMDS  
Driver  
50 W  
+
0 V or 3.6 V  
_
Figure 3. Short Circuit Output Current Test Circuit  
V
OH  
V
Y
50%  
V
Z
V
OL  
t
sk(D)  
Figure 4. Definition of Intra-Pair Differential Skew  
AVcc  
R
T
R
T
SMA  
SMA  
<2" 50!  
Data +  
Coax  
Coax  
Coax  
Coax  
RX  
M
U
X
Transmission Line  
OUT  
+
EQ  
SMA  
SMA  
<2" 50!  
Data -  
Video Patterm  
Generator  
Transmission Line  
Jitter Test  
Instrument  
HDMI Cables  
TMDS250  
AVcc  
1000 mVpp  
Differential  
R
T
R
T
SMA  
SMA  
SMA  
SMA  
<2" 50!  
Coax  
Coax  
Coax  
Coax  
Clk+  
Clk-  
RX  
M
U
X
Transmission Line  
OUT  
+
EQ  
<2" 50!  
Transmission Line  
Jitter Test  
Instrument  
TP3  
TP1  
TP2  
A. HDMI 1.3 compliant cable when EQ = Low, and 10m 28AWG input cable when EQ = High.  
B. All jitters are measured in BER of 10-9  
C. The residual jitter reflects the total jitter measured at the output of the DUT, TP3, subtract the total jitter from the  
signal generator, TP1  
Figure 5. Jitter Test Circuit  
Copyright © 2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
11  
Product Folder Link(s): TMDS250  
 
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
PARAMETER MEASUREMENT INFORMATION (continued)  
A
Input-1  
kept HIGH  
B
A
B
Input-2  
kept LOW  
VDD  
2
S1  
Clocking  
VDD  
2
S2  
tSX  
tSX  
ten  
tdis  
Y
Output  
75mV  
-75mV  
75mV  
-75mV  
Hi-Z  
Z
Figure 6. TMDS Outputs Control Timing Definitions  
VDD  
2
HPD_SINK  
VDD  
2
0.4 V  
HPD1  
t
t
t
pd(HPD)  
sx(HPD)  
pd(HPD)  
2.4 V  
HPD2  
S1  
GND  
VDD  
2
S2  
t
sx(DDC)  
SDA_SINK  
1.5V  
t
t
pd(DDC)  
pd(DDC)  
SDA1  
SDA2  
1.5V  
0V  
Figure 7. Port Switch Timing Definitions  
12  
Submit Documentation Feedback  
Copyright © 2007, Texas Instruments Incorporated  
Product Folder Link(s): TMDS250  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
TYPICAL CHARACTERISTICS  
SUPPLY CURRENT  
vs  
SIGNAL RATE  
SUPPLY CURRENT  
vs  
FREE-AIR TEMPERATURE  
200  
200  
S1 = LOW  
S1 = LOW  
V
V
= AV  
CC  
= 3.3 V,  
CC  
V
= AV  
= 3.3 V, T = 25°C,  
CC  
CC A  
150  
100  
150  
100  
= 1200 mV , RVSADJ = 4.02 kW,  
PP  
ID(PP)  
TP1 V  
= 1200 mV , RVSADJ = 4.02 kW,  
ID(PP)  
PP  
Am/Bm(2:4) 2.5-Gbps HDMI Data pattern,  
Am/Bm(1) 250-MHz Clock  
Am/Bm(2:4) HDMI Data pattern, 250 Mbps-2.5 Gbps  
Am/Bm(1) Clock, 25 MHz-250 MHz  
50  
0
50  
0
I
S1 = HIGH S2 = LOW  
I
DD  
S1 = HIGH S2 = LOW  
DD  
250 450 650 850 1050 1250 1450 1650 1850 2450  
Signal Rate - Mbps  
0
10  
20  
30  
40  
50  
- Free Air Temperature - °C  
60  
70  
T
A
Figure 8.  
Figure 9.  
RESIDUAL PEAK-TO-PEAK JITTER  
RESIDUAL PEAK-TO-PEAK JITTER  
(Data Channels)  
vs  
(Clock Channel)  
vs  
SIGNAL RATE  
FREQUENCY  
20  
15  
10  
5
4
See Note A  
See Note A  
EQ = HIGH 15m 26 AWG  
EQ = LOW  
5m 28 AWG  
EQ = HIGH  
15m 26 AWG  
3
2
EQ = HIGH 10m 28 AWG  
EQ = LOW 3m 30 AWG  
5
0
1
0
EQ = HIGH 10m 28 AWG  
EQ = LOW 3m 30 AWG  
EQ = LOW 5m 28 AWG  
75  
95  
115  
148.5  
185  
225  
750  
950  
1150  
1485  
1850  
2250  
f - Frequency - MHz  
Signal Rate - Mbps  
A. Channels 2, 3, 4, VCC = AVCC = 3.3 V, TA  
=
A. Channel 1, VCC = AVCC = 3.3 V, TA = 25°C,  
25°C, RVSADJ = 4.02 k, See Figure 5  
RVSADJ = 4.02 k, See Figure 5  
Figure 10.  
Figure 11.  
Copyright © 2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
13  
Product Folder Link(s): TMDS250  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
TYPICAL CHARACTERISTICS (continued)  
RESIDUAL PEAK-TO-PEAK JITTER  
RESIDUAL PEAK-TO-PEAK JITTER  
(Data Channel)  
vs  
(Data Channel)  
vs  
CABLE  
CABLE  
20  
15  
20  
18  
16  
See Note A  
See Note A  
EQ = Low  
14  
12  
10  
8
EQ = Low  
EQ = High  
10  
5
EQ = High  
6
4
2
0
0
1.5m  
30AWG  
3m 30  
AWG  
5m  
10m  
15m  
1.5m  
30AWG  
3m 30  
AWG  
5m  
28AWG  
10m 15m  
28AWG 26AWG  
28AWG 28AWG 26AWG  
Cable  
Cable  
A. 1080p 10-Bit, VCC = AVCC = 3.3 V, TA = 25°C,  
RVSADJ 4.02 k, See Figure 5, Clock  
A. 1080p 12-Bit, VCC = AVCC = 3.3 V, TA = 25°C,  
RVSADJ 4.02 k, See Figure 5, Clock  
=
=
Channel = 185.6 MHz, Data Channel = 1.856  
Channel = 222.8 MHz, Data Channel = 2.228  
Gbps  
Gbps  
Figure 12.  
Figure 13.  
14  
Submit Documentation Feedback  
Copyright © 2007, Texas Instruments Incorporated  
Product Folder Link(s): TMDS250  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
APPLICATION INFORMATION  
Supply Voltage  
The TMDS250 is powered up with two different power sources. One is 3.3-V VCC for the TMDS circuitry, and the  
other is 5-V VDD for HPD, DDC, and most of the control logic. It is recommended to provide the same 3.3-V  
power source to the TMDS circuitry of the TMDS250 and its output termination voltage. This minimizes the  
leakage current from the ESD protection circuitry. When the digital television (DTV) is in standby mode operation,  
the same common 3.3-V power source can be turned on or off. Either way will minimize the leakage current in  
the device, and in the receiver connected at the output where the termination is integrated.  
TMDS Inputs  
Selectable frequency response equalization circuitries are provided to all twelve differential input to support short  
range and long range cable connections. The frequency response compensation curves and target cable losses  
are shown in Figure 14 and Figure 15.  
0
-1  
EQ = Low  
-2  
3m 30 AWG cable  
-3  
-4  
spec  
-5  
-6  
-7  
-8  
-9  
-10  
-11  
-12  
-13  
0
250  
500  
750  
1000  
1250  
1500  
1750  
2000  
f - Frequency - MHz  
Figure 14. Frequency Response Compensation Curve at EQ = L  
Copyright © 2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
15  
Product Folder Link(s): TMDS250  
 
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
0
-2  
-4  
spec  
-6  
-8  
-10  
-12  
10m cable  
-14  
-16  
EQ = High  
-18  
-20  
0
250  
500  
750  
1000  
1250  
1500  
1750  
2000  
f - Frequency - MHz  
Figure 15. Frequency Response Compensation Curve at EQ = H  
Internal termination circuitry which can be switched on or off, provides 50-resistance to each differential input  
pin when a port is selected. External terminations are not required. When the termination is switched on, current  
will flow to the TMDS driver. When a port is not selected, the termination is open. This stops supply current  
flowing from the input pins of the unselected ports. This switchable termination provides the connected HDMI  
source another method of determining the sink port status, and whether it is selected or not selected, without  
referring to the HPD pin status.  
TMDS Input Fail-Safe  
The TMDS input does not incorporate a fail-safe circuit. To implement fail-safe, the input can be externally biased  
to prevent output oscillation. One pin can be pulled high to VCC with the other grounded through a 1-kresistor  
as shown in Figure 16.  
V
CC  
R
INT  
R
INT  
R
T
Y
Z
A
TMDS  
Receiver  
TMDS  
Driver  
AV  
CC  
B
R
T
Figure 16. TMDS Input Fail-Safe Recommendation  
TMDS Outputs  
A 10% precision resistor, 4.02-k, is recommended to control the output swing to the HDMI compliant 400 mV to  
600 mV range (500 mV typical). The TMDS outputs are high impedance under standby mode operation, S1 = H  
and S2 = L.  
16  
Submit Documentation Feedback  
Copyright © 2007, Texas Instruments Incorporated  
Product Folder Link(s): TMDS250  
 
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
HPD Pins  
The HPD circuits are powered by the 5-V supply. They provide 5-V TTL output signals to the SOURCE with a  
typical 1-koutput resistance. An external 1-kresistor is not needed here. The HPD output of the selected  
source port follows the logic level of the HPD_SINK input. Unselected HPD outputs are kept low. When the  
device is in standby mode, all HPD outputs follow HPD_SINK. A 1-kresistor to ground keeps all HPD outputs  
low in standby mode if a fixed low state is preferred.  
DDC Channels  
The DDC circuits (SDA, SCL) are powered by a 5-V supply. The I/O pins can connect to the 5-V termination  
voltages directly. A 47-kpull-up resistor to the 5 V is recommended on the SCL1 and SCL2 pins. There is no  
pull-up resistor on the SDA pins. The pull-up resistor can be replaced with a different value.  
Source  
Sink  
V
V
CCRx  
V
DDSink  
DDSource  
R
R
upSink  
upRx  
R
upSource  
I
to-Source  
SCL_SINK  
SDA_SINK  
Ron  
SCL  
SDA  
I
to-Sink  
Driver (Source)  
Driver (Sink)  
Figure 17. Simplified Electrical Circuit Model for DDC Channel  
In Figure 17, when the Driver (Sink) pulls the bus low, the highest voltage level is Vol(Sink)max. The current flow  
through the pass-gate resistor can be presented as:  
Vdd * Vol(Sink)max  
Ito * Sink +  
RupSource ø RupSink  
(1)  
where the Vddsource = Vddsink = Vdd  
To simplify the equation, Vol(Sink)max is set equal to 0 V to reach equation (2):  
Vdd  
lto * Sink +  
RupSource ø RupSink  
(2)  
The voltage at the input of the SINK is Ito - Sink × Ron + Vol(Sink)max, which should be lower than the minimum  
input low threshold voltage of the Driver (Source), Vith(Source)min to keep the bus in correct interoperations.  
V
ith(Source)min u lto * Sink   Ron ) Vol(Sink)max  
(3)  
By combining equations (2) and (3), the minimum pull-up resistor at the Sink input is:  
V
  Ron   R  
dd  
upSource  
* V   Ron  
upSource dd  
R
w
upSink  
(V  
* V  
)   R  
ith(Source)min  
ol(Sink)max  
(4)  
Applying the same methodology to calculate the pull-up resistor at the input of the Driver (Sink), the minimum  
pull-up resistor is:  
VccRx   Ron  
(Vith(Sink)min * Vol(Source)max  
R
upRx w  
)
(5)  
The data sheet VPASS specification ensures the maximum output voltage is clamped at 3.6 V to support a 3.3-V  
connection. Resistors pulling up to 3.3 V on SCL_SINK and SDA_SINK ensure the high level does not exceed  
the 3.3-V termination voltage.  
Copyright © 2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
17  
Product Folder Link(s): TMDS250  
 
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
Layout Considerations  
The high-speed differential TMDS inputs are the most critical paths for the TMDS250. There are several  
considerations to minimize discontinuities on these transmission lines between the connectors and the device:  
Maintain 100-differential transmission line impedance into and out of the TMDS250  
Keep an uninterrupted ground plane beneath the high-speed I/Os  
Keep the ground-path vias to the device as close as possible to allow the shortest return current path  
Keep the trace lengths of the TMDS signals between connector and device as short as possible  
Using the TMDS250 in Systems with Different CEC Link Requirements  
The TMDS250 supports a DTV with up to three HDMI inputs when used in conjunction with a signal-port HDMI  
receiver or three HDMI inputs when used in conjunction with a dual-port HDMI receiver. Figure 18 and Figure 19  
show simplified application block diagrams for the TMDS250 in different DTVs with different consumer electronic  
control (CEC) requirements. The CEC is an optional feature of the HDMI interface for centralizing and simplifying  
user control instructions from multiple audio/video products in an inter-connected system, even when all the  
audio/video products are from different manufacturers. This feature minimizes the number of remote controls in a  
system, as well as reducing the number of times buttons need to be pressed.  
A DTV Supporting a Passive CEC Link  
In Figure 18, the DTV does not have the capability of handling CEC signals, but allows CEC signals to pass over  
the CEC bus. The source selection is done by the control command of the DTV. The user cannot force the  
command from any audio/video product on the CEC bus. The selected source reads the E-EDID data after  
receiving an asserted HPD signal. The micro-controller loads different CEC physical addresses while changing  
the source by means of the S1 and S2 pins.  
E-EDID Reading Configurations in Standby Mode  
When the DTV system is in standby mode, the sources will not read the E-EDID memory because the 1-kΩ  
pull-down resistor keeping the HPD_SINK input at logic low forces all HPD pins to output logic low to all sources.  
The source will not read the E-EDID data with a low on HPD signal. However, if reading the E-EDID data in the  
system standby mode is preferred, then TMDS250 can still support this need.  
The recommended configuration sequences are:  
1. Apply the same 3.3-V power to the VCC of TMDS250 and the TMDS line termination at the HDMI receiver  
2. Turn off VCC, and keep VDD on. The TMDS circuit is off, but the HPD, the DDC and the source selection  
circuits are active.  
3. Set S1 and S2 to select the source port which is allowed to read the E-EDID memory.  
Please note if the source has a time-out limitation between the 5 V and the HPD signals, the above configuration  
is not applicable. Uses individual EEPROMs assigned for each input port, see Figure 19. The solution uses  
E-EDID data to be readable during system power off or standby mode operations.  
18  
Submit Documentation Feedback  
Copyright © 2007, Texas Instruments Incorporated  
Product Folder Link(s): TMDS250  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
SINK  
VDD  
(5V)  
VCC  
(3.3V)  
HPD  
5V  
HPD  
5V  
HPD1  
5V  
47kW  
EQ  
m Controller  
SDA1  
SCL1  
S1  
S2  
SDA  
SCL  
CEC  
SDA  
SCL  
CEC  
SOURCE1  
CEC  
A11/B11  
A12/B12  
A13/B13  
A14/B14  
CLK  
D0  
D1  
D2  
CLK  
D0  
D1  
D2  
HPD_SINK  
1kW  
3.3V  
4.7kW  
4.7kW  
HPD  
5V  
HPD  
5V  
DDC_SDA  
DDC_SCL  
HPD2  
SDA_SINK  
SCL_SINK  
5V  
47kW  
E-EDID  
SDA2  
SCL2  
SDA  
SCL  
CEC  
SDA  
SCL  
CEC  
HDMI RX  
SOURCE2  
CEC  
Y1/Z1  
Y2/Z2  
Y3/Z3  
Y4/Z4  
Y1/Z1  
Y2/Z2  
Y3/Z3  
Y4/Z4  
A21/B21  
A22/B22  
A23/B23  
A24/B24  
CLK  
D0  
D1  
CLK  
D0  
D1  
D2  
D2  
VSadj  
GND  
4.02k W 10%  
Figure 18. Two-Port HDMI Enabled DTV with TMDS250 – CEC Commands Passing Through  
A DTV Supporting an Active CEC Link  
In Figure 19, R, and S, the CEC PHY and CEC LOGIC functions are added. The DTV can initiate and/or react to  
CEC signals from its remote control or other audio/video products on the same CEC bus. All sources must have  
their own CEC physical address to support the full functionality of the CEC link.  
A source reads its CEC physical address stored its E-EDID memory after receiving a logic-high from the HPD  
feedback. When HPD is high, the sink-assigned CEC physical address should be maintained. Otherwise, when  
HPD is low the source sets CEC physical address value to (F.F.F.F).  
Case 1 – AC Coupled Source (See Figure 19, Port 1)  
When the source TMDS lines are AC coupled or when the source cannot detect the TMDS termination provided  
in the connected sink, the indication of the source selection can only come from the HPD signal. The TMDS250  
HPD1 pin should be applied directly as the HPD signal back to the source.  
Case 2 – DC Coupled Source (See Figure 19, Port 2)  
When the source TMDS lines are DC coupled, there are two methods to inform the source that it is the active  
source to the sink. One is checking the HPD signal from the sink, and the other is checking the termination  
condition in the sink.  
In a full CEC operation mode, the HPD signal is set high whether the port is selected or not. The source loads  
and maintains the CEC physical address when HPD is high. As soon as HPD goes low, the source loses the  
CEC physical address. To keep the CEC physical address to the source, the HPD signal is looping back from the  
source provided 5-V signal through a 1-kpull-up resistor in the sink. This method is acceptable in application  
where the HDMI transmitter can detect the receiver termination by current sensing, and the receiver has  
switchable termination on the TMDS inputs. The internal termination resistors are connected to the termination  
voltage when the port is selected, or they are disconnected when the port is not selected. The TMDS250  
features switchable termination on the TMDS inputs.  
Case 3 – External Logic Control for HPD (See Figure 19, Port 3)  
When the HDMI transmitter does not have the capability of detecting the receiver termination, using the HPD  
signal as a reference for sensing port selections is the only possible method. External control logic for switching  
the connections of the HPD signals between the HPD pins of the TMDS250 and the 5-V signal from the source  
provides a good solution.  
Copyright © 2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
19  
Product Folder Link(s): TMDS250  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
E-EDID Reading Configurations in Standby Mode  
When the TMDS250 is in standby mode operation, S1 = H and S2 = L, all sources can read their E-EDID  
memories simultaneously with all HPD pins following HPD_SINK in logic-high. HPD_SINK input low will prevent  
E-EDID reading in standby mode operation.  
SINK  
VDD  
(5V)  
VCC  
(3.3V)  
HPD  
5V  
HPD  
5V  
HPDx  
SDA SCL  
mController  
EQ  
5V  
47kW  
SDAx  
SCLx  
S1  
S2  
SDA  
SCL  
CEC  
SDA  
SCL  
CEC  
CEC  
LOGIC  
SOURCE  
with AC coupled  
HDMI output  
CEC  
E-EDID  
Ax1/Bx1  
Ax2/Bx2  
Ax3/Bx3  
Ax4/Bx4  
CLK  
D0  
D1  
CLK  
D0  
HPD_SINK  
D1  
D2  
D2  
1kW  
CEC  
PHY  
3.3V  
4.7kW  
7kW  
DDC_SDA  
DDC_SCL  
SDA_SINK  
SCL_SINK  
HDMI RX  
1/Z1  
Y2/Z2  
Y3/Z3  
4/Z4  
Y1/Z1  
Y2/Z2  
Y3/Z3  
Y4/Z4  
VSadj  
GND  
4.02kW 10%  
Figure 19. Two-Port HDMI Enabled DTV with TMDS250 – AC Coupled Source - CEC Commands Active  
SINK  
VDD  
(5V)  
VCC  
(3.3V)  
HPD  
5V  
HPD  
5V  
HPDx  
SDA SCL  
mController  
1kW  
EQ  
5V  
47kW  
SDAx  
SCLx  
S1  
S2  
SDA  
SCL  
CEC  
SDA  
SCL  
CEC  
CEC  
LOGIC  
SOURCE  
with DC coupled  
HDMI output  
CEC  
E-EDID  
Ax1/Bx1  
Ax2/Bx2  
Ax3/Bx3  
Ax4/Bx4  
CLK  
D0  
CLK  
D0  
HPD_SINK  
D1  
D2  
D1  
D2  
1kW  
CEC  
PHY  
3.3V  
4.7kW  
7kW  
DDC_SDA  
DDC_SCL  
SDA_SINK  
SCL_SINK  
HDMI RX  
1/Z1  
Y2/Z2  
Y3/Z3  
4/Z4  
Y1/Z1  
Y2/Z2  
Y3/Z3  
Y4/Z4  
VSadj  
GND  
4.02kW 10%  
Figure 20. Two-Port HDMI Enabled DTV with TMDS250 – DC Coupled Source - CEC Commands Active  
20  
Submit Documentation Feedback  
Copyright © 2007, Texas Instruments Incorporated  
Product Folder Link(s): TMDS250  
TMDS250  
www.ti.com  
SLLS866AUGUST 2007  
SINK  
VDD  
(5V)  
VCC  
(3.3V)  
HPD  
5V  
HPD  
5V  
HPDx  
SDA SCL  
1kW  
EQ  
5V  
mController  
47kW  
SDAx  
SCLx  
S1  
S2  
SDA  
SCL  
CEC  
SDA  
SCL  
CEC  
CEC  
LOGIC  
SOURCE  
in general HDMI output  
E-EDID  
CEC  
Ax1/Bx1  
Ax2/Bx2  
Ax3/Bx3  
Ax4/Bx4  
CLK  
D0  
D1  
D2  
CLK  
D0  
D1  
D2  
HPD_SINK  
1kW  
CEC  
PHY  
3.3V  
7kW  
4.7kW  
DDC_SDA  
DDC_SCL  
SDA_SINK  
SCL_SINK  
HDMI RX  
1/Z1  
Y2/Z2  
Y3/Z3  
4/Z4  
Y1/Z1  
Y2/Z2  
Y3/Z3  
Y4/Z4  
VSadj  
GND  
4.02kW 10%  
Figure 21. Two-Port HDMI Enabled DTV with TMDS250 – External Logic - CEC Commands Active  
Copyright © 2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
21  
Product Folder Link(s): TMDS250  
PACKAGE OPTION ADDENDUM  
www.ti.com  
5-Oct-2007  
PACKAGING INFORMATION  
Orderable Device  
TMDS250PAGR  
Status (1)  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
TQFP  
PAG  
64  
1500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
TMDS250PAGRG4  
TQFP  
PAG  
64  
1500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
19-Mar-2008  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) W1 (mm)  
(mm) (mm) Quadrant  
TMDS250PAGR  
TQFP  
PAG  
64  
1500  
330.0  
24.4  
13.0  
13.0  
1.4  
16.0  
24.0  
Q2  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
19-Mar-2008  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
TQFP PAG 64  
SPQ  
Length (mm) Width (mm) Height (mm)  
346.0 346.0 41.0  
TMDS250PAGR  
1500  
Pack Materials-Page 2  
MECHANICAL DATA  
MTQF006A – JANUARY 1995 – REVISED DECEMBER 1996  
PAG (S-PQFP-G64)  
PLASTIC QUAD FLATPACK  
0,27  
0,17  
0,50  
48  
M
0,08  
33  
49  
32  
64  
17  
0,13 NOM  
1
16  
7,50 TYP  
Gage Plane  
10,20  
SQ  
9,80  
0,25  
12,20  
SQ  
0,05 MIN  
11,80  
0°7°  
1,05  
0,95  
0,75  
0,45  
Seating Plane  
0,08  
1,20 MAX  
4040282/C 11/96  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Falls within JEDEC MS-026  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,  
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should  
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are  
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard  
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where  
mandated by government requirements, testing of all parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and  
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide  
adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,  
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information  
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a  
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual  
property of the third party, or a license from TI under the patents or other intellectual property of TI.  
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied  
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive  
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional  
restrictions.  
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all  
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not  
responsible or liable for any such statements.  
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably  
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing  
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and  
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products  
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be  
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in  
such safety-critical applications.  
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are  
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military  
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at  
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.  
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are  
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated  
products in automotive applications, TI will not be responsible for any failure to meet such requirements.  
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:  
Products  
Applications  
Audio  
Automotive  
Broadband  
Digital Control  
Medical  
Amplifiers  
Data Converters  
DSP  
Clocks and Timers  
Interface  
amplifier.ti.com  
dataconverter.ti.com  
dsp.ti.com  
www.ti.com/clocks  
interface.ti.com  
logic.ti.com  
www.ti.com/audio  
www.ti.com/automotive  
www.ti.com/broadband  
www.ti.com/digitalcontrol  
www.ti.com/medical  
www.ti.com/military  
Logic  
Military  
Power Mgmt  
Microcontrollers  
RFID  
power.ti.com  
microcontroller.ti.com  
www.ti-rfid.com  
Optical Networking  
Security  
Telephony  
Video & Imaging  
Wireless  
www.ti.com/opticalnetwork  
www.ti.com/security  
www.ti.com/telephony  
www.ti.com/video  
RF/IF and ZigBee® Solutions www.ti.com/lprf  
www.ti.com/wireless  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2008, Texas Instruments Incorporated  
配单直通车
TMDS250PAGR产品参数
型号:TMDS250PAGR
Brand Name:Texas Instruments
是否无铅: 不含铅
是否Rohs认证: 符合
生命周期:Active
IHS 制造商:TEXAS INSTRUMENTS INC
零件包装代码:QFP
包装说明:TFQFP, TQFP64,.47SQ
针数:64
Reach Compliance Code:compliant
ECCN代码:EAR99
HTS代码:8542.39.00.01
Factory Lead Time:1 week
风险等级:1.13
其他特性:ALSO IT REQUIRES 4.5V TO 5.5V SUPPLY
商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:S-PQFP-G64
JESD-609代码:e4
长度:10 mm
湿度敏感等级:3
功能数量:1
端子数量:64
最高工作温度:70 °C
最低工作温度:
封装主体材料:PLASTIC/EPOXY
封装代码:TFQFP
封装等效代码:TQFP64,.47SQ
封装形状:SQUARE
封装形式:FLATPACK, THIN PROFILE, FINE PITCH
峰值回流温度(摄氏度):260
电源:3.3,5 V
认证状态:Not Qualified
座面最大高度:1.2 mm
子类别:Other Consumer ICs
最大压摆率:200 mA
最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V
表面贴装:YES
温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING
端子节距:0.5 mm
端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10 mm
Base Number Matches:1
  •  
  • 供货商
  • 型号 *
  • 数量*
  • 厂商
  • 封装
  • 批号
  • 交易说明
  • 询价
批量询价选中的记录已选中0条,每次最多15条。
 复制成功!