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产品型号TPS3305的Datasheet PDF文件预览

TPS3305-18, TPS3305-25, TPS3305-33  
DUAL PROCESSOR SUPERVISORS  
SLVS198 – DECEMBER 1998  
D OR DGN PACKAGE  
(TOP VIEW)  
Dual Supervisory Circuits for DSP and  
Processor-Based Systems  
Power-On Reset Generator with Fixed  
Delay Time of 200 ms, no External  
Capacitor Needed  
SENSE1  
SENSE2  
WDI  
V
DD  
MR  
1
2
3
4
8
7
6
5
RESET  
RESET  
Watchdog Timer Retriggers the RESET  
GND  
Output at SENSEn V  
IT+  
Temperature-Compensated Voltage  
Reference  
Maximum Supply Current of 40 µA  
Supply Voltage Range . . . 2.7 V to 6 V  
Defined RESET Output from V  
MSOP-8 and SO-8 Packages  
1.1 V  
DD  
Temperature Range . . . – 40°C to 85°C  
typical applications  
Figure 1 lists some of the typical applications for the TPS3305 family, and a schematic diagram for a DSP-based  
system application. This application uses TI part numbers TPS3305–25, TPS7133, TPS71025, and  
TMS320VC549.  
TPS7133  
GND  
3.3 V  
V
I
5 V – 10 V  
V
O
GND  
V
I
V
O
Applications using DSPs, Microcontrollers  
or Microprocessors  
2.5 V  
TPS71025  
Industrial Equipment  
Programmable Controls  
V
DSP  
DD  
SENSE 1  
SENSE 2  
TPS3305–25  
RESET  
WDI  
Automotive Systems  
DV  
CV  
Portable/Battery Powered Equipment  
Intelligent Instruments  
DD  
DD  
External  
Reset  
Source  
MR  
Wireless Communication Systems  
Notebook/Desktop Computers  
TMS320VC549  
RESET  
XF  
GND  
GND  
Figure 1. Applications Using the TPS3305 Family  
description  
The TPS3305 family is a series of micropower supply voltage supervisors designed for circuit initialization,  
primarily in DSP and processor-based systems, which require two supply voltages.  
The product spectrum of the TPS3305 is designed for monitoring two independent supply voltages of  
3.3 V/1.8 V, 3.3 V/2.5 V or 3.3 V /5 V.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS3305-18, TPS3305-25, TPS3305-33  
DUAL PROCESSOR SUPERVISORS  
SLVS198 – DECEMBER 1998  
description (continued)  
The various supply voltage supervisors are designed to monitor the nominal supply voltage, as shown in the  
following supply voltage monitoring table.  
SUPPLY VOLTAGE MONITORING  
NOMINAL SUPERVISED VOLTAGE  
THRESHOLD VOLTAGE (TYP)  
DEVICE  
SENSE1  
3.3 V  
3.3 V  
5 V  
SENSE2  
1.8 V  
SENSE1  
2.93 V  
2.93 V  
4.55 V  
SENSE2  
1.68 V  
2.25 V  
2.93 V  
TPS3305-18  
TPS3305-25  
TPS3305-33  
2.5 V  
3.3 V  
During power-on, RESET is asserted when the supply voltage V becomes higher than 1.1 V. Thereafter, the  
DD  
supply voltage supervisor monitors the SENSEn inputs and keeps RESET active as long as SENSEn remains  
below the threshold voltage V  
.
IT+  
AninternaltimerdelaysthereturnoftheRESEToutputtotheinactivestate(high)toensurepropersystemreset.  
Thedelaytime, t = 200ms, startsafterSENSE1andSENSE2inputshaverisenabovethethresholdvoltage  
dtyp  
V
. When the voltage at SENSE1 or SENSE2 input drops below the threshold voltage V , the RESET output  
IT+  
IT–  
becomes active (low) again.  
The TPS3305-xx devices integrate a watchdog timer that is periodically triggered by a positive or negative  
transition of WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval,  
t
= 1.6 s, RESET becomes active for the time period t . This event also reinitializes the watchdog timer.  
t(out)  
d
Leaving WDI unconnected disables the watchdog.  
The TPS3305-xx family of devices incorporates a manual reset input, MR. A low level at MR causes RESET  
to become active. In addition to the active-low RESET output, the TPS3305-xx family includes an active-high  
RESET output.  
The TPS3305-xx devices are available in either 8-pin MSOP or standard 8-pin SO packages.  
The TPS3305-xx family is characterized for operation over a temperature range of – 40°C to 85°C.  
AVAILABLE OPTIONS  
PACKAGED DEVICES  
MARKING  
DGN PACKAGE  
CHIP FORM  
(Y)  
PowerPAD  
µ-SMALL OUTLINE  
(DGN)  
T
A
SMALL OUTLINE  
(D)  
TPS3305-18D  
TPS3305-25D  
TPS3305-33D  
TPS3305-18DGN  
TPS3305-25DGN  
TPS3305-33DGN  
TIAAM  
TIAAN  
TIAAO  
TPS3305-18Y  
TPS3305-25Y  
TPS3305-33Y  
–40 C to 85 C  
PowerPAD is a trademark of Texas Instruments Incorporated.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS3305-18, TPS3305-25, TPS3305-33  
DUAL PROCESSOR SUPERVISORS  
SLVS198 – DECEMBER 1998  
description (continued)  
FUNCTION/TRUTH TABLES  
MR  
L
SENSE1>V  
SENSE2>V  
RESET  
RESET  
IT1  
IT2  
X
X
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
0
0
0
0
0
1
1
1
1
0
1
1
0
0
1
1
X = Don’t care  
functional block diagram  
V
DD  
TPS3305  
14 kΩ  
MR  
R1  
+
_
SENSE 1  
RESET  
RESET  
R2  
R3  
RESET  
Logic + Timer  
+
_
SENSE 2  
GND  
R4  
Reference  
Voltage  
of 1.25 V  
Oscillator  
Watchdog  
Logic + Timer  
Transition  
Detection  
WDI  
40 kΩ  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS3305-18, TPS3305-25, TPS3305-33  
DUAL PROCESSOR SUPERVISORS  
SLVS198 – DECEMBER 1998  
timing diagram  
SENSEn  
V
(nom)  
V
IT–  
t
t
MR  
1
0
t
WDI  
t(out)  
1
t
0
RESET  
1
t
0
t
d
t
d
t
d
t
d
RESET Because  
of SENSE Below V  
RESET Because of WDI  
RESET Because of MR  
IT–  
RESET Because of SENSE Below V  
IT–  
RESET Because of SENSE Below V  
IT–  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS3305-18, TPS3305-25, TPS3305-33  
DUAL PROCESSOR SUPERVISORS  
SLVS198 – DECEMBER 1998  
TPS3305Y chip information  
These chips, when properly assembled, display characteristics similar to those of the TPS3305. Thermal  
compression or ultrasonic bonding may take place on the doped aluminium bonding pads. The chips may be  
mounted with conductive epoxy or a gold-silicon preform.  
(4)  
(3)  
(2)  
(1)  
(1)  
(2)  
(3)  
(4)  
(8)  
(7)  
(6)  
TPS3305Y  
(5)  
48  
CHIP THICKNESS: 10 TYPICAL  
BONDING PADS: 4 × 4 MINIMUM  
T
J
max = 150°C  
TOLERANCES ARE ±10%.  
ALL DIMENSIONS ARE IN MILS  
(7)  
(8)  
(5)  
(6)  
56  
Terminal Functions  
TERMINAL  
I/O  
DESCRIPTION  
NAME  
GND  
NO.  
4
7
5
6
1
2
3
8
Ground  
Manual reset  
MR  
I
O
O
I
RESET  
RESET  
SENSE1  
SENSE2  
WDI  
Active-low reset output  
Active-high reset output  
Sense voltage input 1  
Sense voltage input 2  
Watchdog timer input  
Supply voltage  
I
I
V
DD  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS3305-18, TPS3305-25, TPS3305-33  
DUAL PROCESSOR SUPERVISORS  
SLVS198 – DECEMBER 1998  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage, V  
(see Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
DD  
All other pins (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 7 V  
Maximum low output current, I  
Maximum high output current, I  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 5 mA  
OL  
OH  
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA  
IK  
OK  
I
I
DD  
Output clamp current, I  
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA  
O O DD  
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table  
Operating free-air temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to 85°C  
A
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Soldering temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260 C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTE 1: All voltage values are with respect to GND. For reliable operation the device must not be operated at 7 V for more than t = 1000 h  
continuously.  
DISSIPATION RATING TABLE  
T
25°C  
DERATING FACTOR  
T
= 70°C  
T = 85°C  
A
A
A
PACKAGE  
POWER RATING  
ABOVE T = 25°C  
POWER RATING POWER RATING  
A
DGN  
D
2.14 mW  
17.1 mW/°C  
5.8 mW/°C  
1.37 mW  
464 mW  
1.11 mW  
377 mW  
725 mW  
recommended operating conditions at specified temperature range  
MIN  
2.7  
MAX  
UNIT  
V
Supply voltage, V  
6
DD  
Input voltage at MR and WDI, V  
0
0
V
+0.3  
V
I
DD  
Input voltage at SENSE1 and SENSE2, V  
(V +0.3)V /1.25V  
V
I
DD  
IT  
High-level input voltage at MR and WDI, V  
IH  
0.7xV  
V
DD  
Low-level input voltage at MR and WDI, V  
IL  
0.3×V  
50  
V
DD  
Input transition rise and fall rate at MR, t/V  
Operating free-air temperature range, T  
ns/V  
°C  
–40  
85  
A
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS3305-18, TPS3305-25, TPS3305-33  
DUAL PROCESSOR SUPERVISORS  
SLVS198 – DECEMBER 1998  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
DD  
V
DD  
V
DD  
V
DD  
V
DD  
V
DD  
V
DD  
= 2.7 V to 6 V, I  
= –20 µA  
= –2 mA  
= –3 mA  
= 20 µA  
= 2 mA  
V
DD  
V
DD  
V
DD  
– 0.2V  
OH  
OH  
OH  
OL  
OL  
OL  
OL  
V
High-level output voltage  
= 3.3 V,  
= 6 V,  
I
I
– 0.4V  
– 0.4V  
V
OH  
OL  
= 2.7 V to 6 V, I  
0.2  
0.4  
V
Low-level output voltage  
= 3.3 V,  
= 6 V,  
I
I
I
V
V
= 3 mA  
0.4  
Power-up reset voltage (see Note 2)  
1.1 V,  
= 20 µA  
0.4  
1.64  
2.20  
2.86  
4.46  
1.64  
2.20  
2.86  
4.46  
1.68  
2.25  
2.93  
4.55  
1.68  
2.25  
2.93  
4.55  
15  
1.72  
2.30  
3
VSENSE1,  
VSENSE2  
V
T
= 2.7 V to 6 V,  
DD  
V
V
= 0°C to 85°C  
A
4.64  
1.73  
2.32  
3.02  
4.67  
Negative-going input threshold voltage  
(see Note 3)  
V
IT–  
VSENSE1,  
VSENSE2  
V
T
= 2.7 V to 6 V,  
DD  
=–40°C to 85°C  
A
V
IT–  
V
IT–  
V
IT–  
V
IT–  
= 1.68 V  
= 2.25 V  
= 2.93 V  
= 4.55 V  
20  
V
hys  
Hysteresis at VSENSEn input  
mV  
µA  
30  
40  
WDI = V  
DD  
Time average (dc = 88%)  
= 6 V  
I
I
Average high-level input current  
Average low-level input current  
100  
–15  
150  
–20  
H(AV)  
WDI  
WDI = 0 V,  
Time average (dc = 12%)  
WDI = V = 6 V,  
V
= 6 V,  
= 6 V  
DD  
L(AV)  
WDI  
120  
–130  
5
170  
–180  
8
DD  
MR = 0.7 × V  
MR  
,
V
DD  
DD  
I
H
High-level input current  
Low-level input current  
µA  
µA  
SENSE1  
SENSE2  
WDI  
VSENSE1 = V  
VSENSE2 = V  
WDI = 0 V,  
= 6 V  
= 6 V  
DD  
DD  
6
9
V
V
= 6 V  
= 6 V  
–120  
–430  
–170  
–600  
1
DD,  
I
I
MR  
MR = 0V,  
L
DD  
SENSEn  
VSENSE1,2 = 0 V  
–1  
Supply current  
40  
µA  
DD  
C
Input capacitance  
V = 0 V to V  
I DD  
10  
pF  
i
NOTES: 2. The lowest supply voltage at which RESET becomes active. t , V  
15 µs/V.  
r
DD  
3. To ensure best stability of the threshold voltage, a bypass capacitor (ceramic 0.1 µF) should be placed close to the supply terminals.  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS3305-18, TPS3305-25, TPS3305-33  
DUAL PROCESSOR SUPERVISORS  
SLVS198 – DECEMBER 1998  
timing requirements at V  
= 2.7 V to 6 V, R = 1 M, C = 50 pF, T = 25°C  
L L A  
DD  
PARAMETER  
TEST CONDITIONS  
MIN  
6
TYP  
MAX  
UNIT  
µs  
SENSEn  
V
V
= V  
–0.2 V,  
V
= V  
+0.2 V  
SENSEnL  
IT–  
SENSEnH  
= 0.3 × V  
IL  
IT+  
t
w
Pulse width  
MR  
100  
100  
ns  
= 0.7 × V  
,
V
IH  
DD  
DD  
WDI  
ns  
switching characteristics at V  
= 2.7 V to 6 V, R = 1 M, C = 50 pF, T = 25°C  
DD  
L
L
A
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
V + 0.2 V,  
IT+  
I(SENSEn)  
t
t
t
t
t
t
Watchdog time out  
Delay time  
1.1  
1.6  
2.3  
s
t(out)  
MR 0.7 × V , See timing diagram  
DD  
V
V + 0.2 V,  
IT+  
I(SENSEn)  
140  
200  
200  
280  
500  
ms  
ns  
d
MR 0.7 × V , See timing diagram  
DD  
Propagation (delay) time,  
high-to-low level output  
MR to RESET,  
MR to RESET  
PHL  
PLH  
PHL  
PLH  
V
V
V  
+0.2 V,  
V = 0.3 × V  
IL  
I(SENSEn)  
IH  
IT+  
,
= 0.7 × V  
Propagation (delay) time,  
low-to-high level output  
MR to RESET,  
MR to RESET  
DD  
DD  
Propagation (delay) time,  
high-to-low level output  
SENSEn to RESET,  
SENSEn to RESET  
V
IH  
= V  
+0.2 V, V = V  
IL  
–0.2 V,  
IT–  
IT+  
1
5
µs  
MR 0.7 × V  
Propagation (delay) time,  
low-to-high level output  
SENSEn to RESET,  
SENSEn to RESET  
DD  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS3305-18, TPS3305-25, TPS3305-33  
DUAL PROCESSOR SUPERVISORS  
SLVS198 – DECEMBER 1998  
TYPICAL CHARACTERISTICS  
NORMALIZED SENSE THRESHOLD VOLTAGE  
vs  
SUPPLY CURRENT  
vs  
SUPPLY VOLTAGE  
FREE-AIR TEMPERATURE AT V  
DD  
1.005  
1.004  
1.003  
1.002  
1.001  
1
18  
16  
14  
12  
10  
8
V
= 6 V  
DD  
MR = Open  
TPS3305–33  
6
4
2
0.999  
0.998  
0.997  
0
–2  
–4  
SENSEn = V  
DD  
MR = Open  
= 25°C  
–6  
0.996  
0.995  
T
A
–8  
–10  
–40  
–15  
10  
35  
60  
85  
–0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7  
T
A
– Free-Air Temperature – °C  
V
DD  
– Supply Voltage – V  
Figure 2  
Figure 3  
INPUT CURRENT  
vs  
INPUT VOLTAGE AT MR  
MINIMUM PULSE DURATION AT SENSE  
vs  
THRESHOLD OVERDRIVE  
100  
0
10  
9
V
T
= 6 V  
DD  
= 25°C  
V
= 6 V  
DD  
A
MR = Open  
–100  
–200  
–300  
–400  
–500  
–600  
–700  
8
7
6
5
4
3
2
–800  
–900  
1
0
4.5  
10.5 0 0.5 1 1.5 2 2.5 3 3.5 4  
5 5.5 6 6.5  
0
100 200 300 400 500 600 700 800 900 1000  
SENSE – Threshold Overdrive – mV  
V – Input Voltage at MR – V  
I
Figure 4  
Figure 5  
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS3305-18, TPS3305-25, TPS3305-33  
DUAL PROCESSOR SUPERVISORS  
SLVS198 – DECEMBER 1998  
TYPICAL CHARACTERISTICS  
HIGH-LEVEL OUTPUT VOLTAGE  
vs  
HIGH-LEVEL OUTPUT CURRENT  
HIGH-LEVEL OUTPUT VOLTAGE  
vs  
HIGH-LEVEL OUTPUT CURRENT  
2.5  
2
6.5  
6
V
= 2 V  
DD  
MR = Open  
V
= 6 V  
DD  
MR = Open  
5.5  
5
4.5  
4
1.5  
–40°C  
3.5  
3
–40°C  
1
85°C  
2.5  
2
85°C  
1.5  
1
0.5  
0
0.5  
0
0 –0.5 –1 –1.5 –2 –2.5 –3 –3.5 –4 –4.5 –5 –5.5 –6  
0
–5 –10 –15 –20 –25 –30 –35 –40 –45 –50  
I
– High-Level Output Current – mA  
OH  
I
– High-Level Output Current – mA  
OH  
Figure 6  
Figure 7  
LOW-LEVEL OUTPUT VOLTAGE  
vs  
LOW-LEVEL OUTPUT CURRENT  
LOW-LEVEL OUTPUT VOLTAGE  
vs  
LOW-LEVEL OUTPUT CURRENT  
2.5  
2
6.5  
6
V
= 2 V  
DD  
MR = Open  
V
= 6 V  
DD  
MR = Open  
5.5  
5
4.5  
4
1.5  
1
3.5  
3
85°C  
85°C  
2.5  
2
1.5  
1
0.5  
0
–40°C  
–40°C  
0.5  
0
0
0.5  
1
1.5  
2
3
3.5  
4
4.5  
5
5.5  
6
2.5  
0
5
10 15 20 25 30 35 40 45 50 55 60  
I
– Low-Level Output Current – mA  
OL  
I
– Low-Level Output Current – mA  
OL  
Figure 8  
Figure 9  
10  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS3305-18, TPS3305-25, TPS3305-33  
DUAL PROCESSOR SUPERVISORS  
SLVS198 – DECEMBER 1998  
MECHANICAL DATA  
D (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PIN SHOWN  
0.050 (1,27)  
0.020 (0,51)  
0.014 (0,35)  
0.010 (0,25)  
M
14  
8
0.008 (0,20) NOM  
0.244 (6,20)  
0.228 (5,80)  
0.157 (4,00)  
0.150 (3,81)  
Gage Plane  
0.010 (0,25)  
1
7
0°8°  
0.044 (1,12)  
A
0.016 (0,40)  
Seating Plane  
0.004 (0,10)  
0.010 (0,25)  
0.004 (0,10)  
0.069 (1,75) MAX  
PINS **  
8
14  
16  
DIM  
0.197  
(5,00)  
0.344  
(8,75)  
0.394  
(10,00)  
A MAX  
0.189  
(4,80)  
0.337  
(8,55)  
0.386  
(9,80)  
A MIN  
4040047/D 10/96  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).  
D. Falls within JEDEC MS-012  
11  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TPS3305-18, TPS3305-25, TPS3305-33  
DUAL PROCESSOR SUPERVISORS  
SLVS198 – DECEMBER 1998  
MECHANICAL DATA  
DGN (S-PDSO-G8)  
PowerPAD PLASTIC SMALL-OUTLINE PACKAGE  
0,38  
0,25  
0,65  
M
0,25  
8
5
Thermal Pad  
(See Note D)  
0,15 NOM  
3,05  
2,95  
4,98  
4,78  
Gage Plane  
0,25  
0°6°  
1
4
0,69  
0,41  
3,05  
2,95  
Seating Plane  
0,10  
0,15  
0,05  
1,07 MAX  
4073271/A 01/98  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions include mold flash or protrusions.  
D. The package thermal performance may be enhanced by attaching an external heat sink to the thermal pad. This pad is electrically  
and thermally connected to the backside of the die and possibly selected leads.  
E. Falls within JEDEC MO-187  
PowerPAD is a trademark of Texas Instruments Incorporated.  
12  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
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party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1998, Texas Instruments Incorporated  
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