UC3844N现货热卖使用介绍供应商报价哪里找芯片批发报价-中国IC网-芯三七

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产品型号UC3844N的概述

UC3844N芯片概述 UC3844N是一款广泛应用于电源管理和控制的集成电路，特别是在PWM（脉宽调制）控制器中的用途。它由Unitrode（现为Texas Instruments的一部分）推出，设计目的是为了提高电源转换效率，同时提供良好的性能和可靠性。UC3844N特别适用于开关电源、DC-DC转换器等场合，具有低待机功耗和较快的动态响应特性，因而成为现代电源设计中的重要组件。 UC3844N的详细参数 UC3844N的主要特性包括： 1. 电源电压范围：8V至36V，支持多种输出需求。 2. 输出电流：最大输出电流为1A，适合多种负载条件。 3. 频率范围：操作频率可调，通常在20kHz至100kHz之间，方便设计师调整以适应不同的应用场景。 4. 补偿网络：内部补偿使设计更加简化，不需要外部补偿元件。 5. 热保护：集成热关断功能，对芯片进行过热保护。 6. 启动电流：低启动...

产品型号UC3844N的Datasheet PDF文件预览

www.fairchildsemi.com

UC3842/UC3843/UC3844/UC3845

SMPS Controller

Features

Description

• Low Start up Current

• Maximum Duty Clamp

• UVLO With Hysteresis

• Operating Frequency up to 500KHz

The UC3842/UC3843/UC3844/UC3845 are fixed

frequencycurrent-mode PWM controller. They are specially

designed for Off-Line and DC to DC converter applications

with minimum external components. These integrated

circuits feature a trimmed oscillator for precise duty cycle

control, a temperature compensated reference, high gain

error amplifier, current sensing comparator and a high

current totempole output for driving a Power MOSFET. The

UC3842 and UC3844 have UVLO thresholds of 16V (on)

and 10V (off). The UC3843 and UC3845 are 8.5V(on) and

7.9V (off). The UC3842 and UC3843 can operate within

100% duty cycle. The UC3844 and UC3845 can operate

with 50% duty cycle.

8-SOP

8-DIP

14-SOP

Internal Block Diagram

* NORMALLY 8DIP/8SOP PIN NO.

* ( ) IS 14SOP PINNO.

* TOGGLE FLIP FLOP USED ONLY IN UC3844, UC3845

Rev. 1.0.1

UC3842/UC3843/UC3844/UC3845

Absolute Maximum Ratings

Parameter

Symbol

Value

Unit

Supply Voltage

Output Current

±1

Analog Inputs (Pin 2.3)

Error Amp Output Sink Current

-0.3 to 6.3

(ANA)

°C

SINK (E.A)

Power Dissipation at T ≤25°C (8DIP)

P (Note1,2)

1200

460

Power Dissipation at T ≤25°C (8SOP)

P (Note1,2)

Power Dissipation at T ≤25°C (14SOP)

P (Note1,2)

680

Storage Temperature Range

-65 ~ +150

+300

STG

Lead Temperature (Soldering, 10sec)

°C

LEAD

Note:

1. Board Thickness 1.6mm, Board Dimension 76.2mm ×114.3mm, (Reference EIA / JSED51-3, 51-7)

2. Do not exceeed P and SOA (Safe Operation Area)

Power Dissipation Curve

1200

1100

1000

900

8DIP

14SOP

800

700

8SOP

600

500

400

300

10 20 30 40 50 60 70 80 90 100 110 120 130 140 150

AMBIENT TEMPERATURE (℃)

Thermal Data

Characteristic

Symbol

8-DIP

8-SOP

14-SOP

Unit

°C/W

Thermal Resistance Junction-ambient

100

265

180

thj-amb(MAX)

Pin Array

8DIP,8SOP

14SOP

REF

COMP

V^FB

COMP

N/C

V^CC

N/C

V^FB

CURRENT SENSE

R^T/C^T

OUTPUT

GND

12 V^CC

N/C

PWR V

10 OUTPUT

CURRENT SENSE

GND

N/C

R^T/C^T

PWR GND

UC3842/UC3843/UC3844/UC3845

Electrical Characteristics

(V =15V, R =10kΩ, C =3.3nF, T = 0°C to +70°C, unless otherwise specified)

Parameter

Symbol

Conditions

Min.

Typ. Max. Unit

REFERENCE SECTION

Reference Output Voltage

Line Regulation

T = 25°C, I

= 1mA

4.90

5.00

5.10

REF

∆V

12V ≤ V

≤ 25V

REF

Load Regulation

1mA ≤ I

≤ 20mA

REF

Short Circuit Output Current

OSCILLATOR SECTION

Oscillation Frequency

T = 25°C

-100

-180

T = 25°C

0.05

1.6

kHz

Frequency Change with

Voltage

∆f/∆V

12V ≤ V

≤ 25V

Oscillator Amplitude

ERROR AMPLIFIER SECTION

Input Bias Current

P-P

OSC

2.42

-0.1

2.50

-2

µA

BIAS

Input Voltage

= 2.5V

2.58

I(E>A)

pin1

Open Loop Voltage Gain

Power Supply Rejection Ratio

Output Sink Current

Output Source Current

High Output Voltage

Low Output Voltage

CURRENT SENSE SECTION

Gain

2V ≤ V ≤ 4V (Note3)

PSRR

12V ≤ V

≤ 25V (Note3)

= 2.7V, V

= 2.3V, V

= 1.1V

= 5V

SINK

pin2

pin1

-0.6

-1.0

SOURCE

= 2.3V, R = 15kΩ to GND

= 2.7V, R = 15kΩ to Pin 8

0.8

1.1

(Note 1 & 2)

= 5V(Note 1)

2.85

3.15

1.1

V/V

Maximum Input Signal

Power Supply Rejection Ratio

Input Bias Current

0.9

I(MAX)

pin1

PSRR

12V ≤ V

≤ 25V (Note 1,3)

-3

µA

-10

BIAS

OUTPUT SECTION

= 20mA

0.08

1.4

0.4

2.2

SINK

Low Output Voltage

High Output Voltage

= 200mA

= 20mA

13.5

13.0

SOURCE

= 200mA

Rise Time

Fall Time

T = 25°C, C = 1nF (Note 3)

150

T = 25°C, C = 1nF (Note 3)

UNDER-VOLTAGE LOCKOUT SECTION

UC3842/UC3844

UC3843/UC3845

UC3842/UC3844

UC3843/UC3844

14.5

7.8

16.0

8.4

17.5

9.0

Start Threshold

TH(ST)

8.5

7.0

10.0

7.6

11.5

8.2

Min. Operating Voltage

(After Turn On)

OPR(MIN)

UC3842/UC3843/UC3844/UC3845

Electrical Characteristics ^(Continued)

(V =15V, R =10kΩ, C =3.3nF, T = 0°C to +70°C, unless otherwise specified)

Parameter

Symbol

Conditions

Min.

Typ. Max. Unit

PWM SECTION

Max. Duty Cycle

Min. Duty Cycle

(Max)

(MIN)

UC3842/UC3843

100

UC3844/UC3845

TOTAL STANDBY CURRENT

Start-Up Current

0.45

Operating Supply Current

Zener Voltage

=ON

= 25mA

CC(OPR)

pin3 pin2

Adjust V above the start threshould before setting at 15V

Note:

1. Parameter measured at trip point of latch

2. Gain defined as:

∆V_pin1

A = -----------------

,0 ≤ Vpin3 ≤ 0.8V

∆V_pin3

3. These parameters, although guaranteed, are not 100 tested in production.

UC3842

Figure 1. Open Loop Test Circuit

High peak currents associated with capacitive loads necessitate careful grounding techniques Timing and bypass capacitors

should be connected close to pin 5 in a single point ground. The transistor and 5kΩ potentiometer are used to sample the

oscillator waveform and apply an adjustable ramp to pin 3.

UC3842/UC3843/UC3844/UC3845

UC3842/44

UC3843/45

Figure 2. Under Voltage Lockout

During Under-Voltage Lock-Out, the output driver is biased to a high impedance state. Pin 6 should be shunted to ground with

a bleeder resistor to prevent activating the power switch with output leakage current.

Figure 3. Error Amp Configuration

Figure 4. Current Sense Circuit

Peak current (I ) is determined by the formula:

1.0V

I_S(MAX)= ------------

R_S

A small RC filter may be required to suppress switch transients.

UC3842/UC3843/UC3844/UC3845

Figure 5. Oscillator Waveforms and Maximum Duty Cycle

Oscillator timing capacitor, C , is charged by V

through R and discharged by an internal current source. During the

REF

discharge time, the internal clock signal blanks the output to the low state. Selection of R and C therefore determines both

oscillator frequency and maximum duty cycle. Charge and discharge times are determined by the formulas:

t = 0.55 R C

0.0063R_T– 2.7

---------------------------------------

t_D= R_TC_TI_n

0.0063R_T– 4

Frequency, then, is: f=(t + t )^-1

1.8

ForRT > 5KΩ,f= --------------

R_TC_T

Figure 6. Oscillator Dead Time & Frequency

(Deadtime vs C RT > 5kΩ)

Figure 7. Timing Resistance vs Frequency

Figure 8. Shutdown Techniques

UC3842/UC3843/UC3844/UC3845

Shutdown of the UC3842 can be accomplished by two methods; either raise pin 3 above 1V or pull pin 1 below a voltage two

diode drops above ground. Either method causes the output of the PWM comparator to be high (refer to block diagram). The

PWM latch is reset dominant so that the output will remain low until the next clock cycle after the shutdown condition at pins

1 and/or 3 is removed. In one example, an externally latched shutdown may be accomplished by adding an SCR which will be

reset by cycling V below the lower UVLO threshold. At this point the reference turns off, allowing the SCR to reset.

UC3842/UC3843

Figure 9. Slope Compensation

A fraction of the oscillator ramp can be resistively summed with the current sense signal to provide slope compensation for

converters requiring duty cycles over 50%. Note that capacitor, C , forms a filter with R2 to suppress the leading edge switch

spikes.

Temperature (°C)

Figure 10. Temperature Drift (Vref)

Figure 11. Temperature Drift (Ist)

Temperature (°C)

Figure 12. Temperature Drift (Icc)

UC3842/UC3843/UC3844/UC3845

Mechanical Dimensions

Package

8-DIP

6.40 ±0.20

0.252 ±0.008

3.30 ±0.30

0.130 ±0.012

5.08

MAX

0.200

7.62

3.40 ±0.20

0.134 ±0.008

0.300

0.33

0.013

MIN

+0.10

–0.05

0.25

+0.004

–0.002

0.010

UC3842/UC3843/UC3844/UC3845

Mechanical Dimensions ^(Continued)

Package

8-SOP

0.1~0.25

0.004~0.001

MIN

1.55 ±0.20

0.061 ±0.008

6.00 ±0.30

0.236 ±0.012

1.80

0.071

MAX

3.95 ±0.20

0.156 ±0.008

5.72

0.225

0.50 ±0.20

0.020 ±0.008

UC3842/UC3843/UC3844/UC3845

Mechanical Dimensions ^(Continued)

Package

14-SOP

0.05

0.002

MIN

1.55 ±0.10

0.061 ±0.004

#14

6.00 ±0.30

0.236 ±0.012

1.80

MAX

0.071

3.95 ±0.20

0.156 ±0.008

5.72

0.225

0.60 ±0.20

0.024 ±0.008

UC3842/UC3843/UC3844/UC3845

Ordering Information

Product Number

UC3842N

UC3843N

UC3844N

UC3845N

UC3842D1

UC3843D1

UC3844D1

UC3845D1

UC3842D

UC3843D

UC3844D

UC3845D

Package

Operating Temperature

8-DIP

8-SOP

0 ~ + 70°C

14-SOP

UC3842/UC3843/UC3844/UC3845

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY

PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY

LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER

DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES

OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR

CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body,

or (b) support or sustain life, and (c) whose failure to

perform when properly used in accordance with

instructions for use provided in the labeling, can be

reasonably expected to result in a significant injury of the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be

reasonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

2/19/02 0.0m 001

Stock#DSxxxxxxxx

2002 Fairchild Semiconductor Corporation

UC3844N相关文章

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UC3844N产品参数

型号:	UC3844N
是否Rohs认证：	符合
生命周期：	Obsolete
IHS 制造商：	FAIRCHILD SEMICONDUCTOR CORP
零件包装代码：	DIP
包装说明：	DIP, DIP8,.3
针数：	8
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	5.09
模拟集成电路 - 其他类型：	SWITCHING CONTROLLER
控制模式：	CURRENT-MODE
控制技术：	PULSE WIDTH MODULATION
最大输入电压：	30 V
最小输入电压：	12 V
标称输入电压：	15 V
JESD-30 代码：	R-PDIP-T8
JESD-609代码：	e3
长度：	9.2 mm
功能数量：	1
端子数量：	8
最高工作温度：	70 °C
最低工作温度：
最大输出电流：	1 A
封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP
封装等效代码：	DIP8,.3
封装形状：	RECTANGULAR
封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT APPLICABLE
认证状态：	Not Qualified
座面最大高度：	5.08 mm
子类别：	Switching Regulator or Controllers
表面贴装：	NO
切换器配置：	SINGLE
最大切换频率：	500 kHz
技术：	BIPOLAR
温度等级：	COMMERCIAL
端子面层：	MATTE TIN
端子形式：	THROUGH-HOLE
端子节距：	2.54 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT APPLICABLE
宽度：	7.62 mm
Base Number Matches：	1

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