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  • UC5603DP
  • 数量660000 
  • 厂家Texas Instruments(德州仪器) 
  • 封装16-SOIC (0.154 
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  • UC5603DP
  • 数量11530 
  • 厂家Texas Instruments 
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  • 数量3570 
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  • 数量20000 
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  • 数量29036 
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  • 数量3000 
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  • 数量1118 
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  • 数量39009 
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  • 数量10000 
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产品型号UC5603DP的概述

UC5603DP芯片概述 UC5603DP是一款高度集成的DC-DC升压转换器,广泛应用于各种电子设备的电源管理与能量转换领域。随着现代电子产品对高效能、高稳定性电源的需求不断增加,UC5603DP凭借其小巧的设计和出色的性能,受到了众多设计工程师的青睐。该芯片能够将低电压直流电源转换为更高电压的直流电源,适用于移动设备、便携式设备以及其他需要高效电源转换的应用。 UC5603DP的详细参数 UC5603DP具备多个重要的电气参数,包括: 1. 输入电压范围:该芯片支持2.5 V至5.5 V的输入电压,使其能够与多种电池供电的设备兼容。 2. 输出电压:UC5603DP的输出电压可调,通常在3.3 V至5 V之间,通过外部电压分压器进行设置。 3. 输出电流:近年来的设计使得该芯片能够提供高达1 A的输出电流,满足大部分应用的需求。 4. 开关频率:UC5603DP的开关频率通常在10...

产品型号UC5603DP的Datasheet PDF文件预览

ꢀ ꢁꢂ ꢃꢄ ꢅ  
ꢆ ꢇꢈ ꢉꢊꢋ ꢌꢁꢌ ꢉ ꢍꢁꢎ ꢉ ꢏꢋ ꢎ ꢋꢐ ꢑꢉ ꢊ ꢍꢎꢒ ꢐ  
SLUS195B − MARCH 1997 − REVISED NOVEMBER 2003  
D
D
D
D
D
D
Complies with SCSI, SCSI−2 and SPI−2  
Standards  
D
Logic Command Disconnects all  
Termination Lines  
6-pF Channel Capacitance during  
Disconnect  
D
D
D
D
Trimmed Termination Current to 3%  
Trimmed Impedance to 3%  
100-µA Supply Current in Disconnect Mode  
Meets SCSI Hot Plugging  
Negative Clamping on all Signal Lines  
Current Limit and Thermal Shutdown  
Protection  
−400-mA Sourcing Current for Termination  
+400-mA Sinking Current for Active  
Negation Drivers  
description  
The UC5603 provides 9 lines of active termination for a SCSI (Small Computers Systems Interface) parallel bus.  
The SCSI standard recommends active termination at both ends of the cable segment.  
The UC5603 provides a disconnect feature which, when opened or driven high, will disconnect all terminating  
resistors, and disables the regulator; greatly reducing standby power. The output channels remain high  
impedance even without Termpwr applied. A low channel capacitance of 6 pF allows units at interim points of  
the bus to have little to no effect on the signal integrity.  
Functionally the UC5603 is similar to its predecessor, the UC5601 − 18 line Active Terminator. Several electrical  
enhancements were incorporated in the UC5603, such as a sink/source regulator output stage to accommodate  
all signal lines at 5 V, while the regulator remains at its nominal value, reduced channel capacitance to 6 pF  
typical, and as with the UC5601, custom power packages are utilized to allow normal operation at full power  
conditions (1.2 watts).  
functional block diagram  
UDG-94049  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢎꢡ  
Copyright 2003, Texas Instruments Incorporated  
ꢝ ꢡ ꢞ ꢝꢖ ꢗꢫ ꢙꢘ ꢜ ꢤꢤ ꢢꢜ ꢚ ꢜ ꢛ ꢡ ꢝ ꢡ ꢚ ꢞ ꢦ  
1
www.ti.com  
ꢀ ꢁꢂꢃ ꢄꢅ  
ꢆꢇ ꢈ ꢉ ꢊꢋ ꢌꢁ ꢌꢉ ꢍ ꢁꢎ ꢉ ꢏꢋ ꢎꢋ ꢐ ꢑꢉ ꢊꢍꢎꢒ ꢐ  
SLUS195B − MARCH 1997 − REVISED NOVEMBER 2003  
description (continued)  
Internal circuit trimming is utilized, first to trim the impedance to a 3% tolerance, and then most importantly, to  
trim the output current to a 3% tolerance, as close to the max SCSI spec as possible, which maximizes noise  
margin in fast SCSI operation.  
Other features include negative clamping on all signal lines to protect external circuitry from latch-up, thermal  
shutdown and current limit.  
This device is offered in low thermal resistance versions of the industry standard 16 pin narrow body SOIC.  
connection diagrams  
DP PACKAGE  
(TOP VIEW)  
N PACKAGE  
(TOP VIEW)  
LINE6  
LINE5  
REG  
LINE7  
LINE8  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
LINE7  
LINE8  
LINE6  
LINE5  
REG  
N/C  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
LINE9  
LINE9  
GND*  
GND*  
N/C  
GND*  
SGND*  
DISCNCT  
LINE1  
SGND  
DISCNCT  
LINE1  
N/C  
TRMPWR  
LINE4  
LINE3  
11 TRMPWR  
10 LINE4  
LINE2  
LINE2  
9
LINE3  
* DP package pin 5 serves as signal ground; pins 4,  
12, 13 serve as heatsink/ground.  
ORDERING INFORMATION  
Packaged Devices  
T
= T  
J
A
DIL -16(N)  
UC5603N  
SOIC-16 (DP){  
0°C to 70°C  
UCUC5603DP  
DP (SOIC−16) packages are available taped and reeled. Add TR suffix to device type (e.g.  
UC5603DPTR) to order quantities of 2000 devices per reel.  
2
www.ti.com  
ꢀ ꢁꢂ ꢃꢄ ꢅ  
ꢆ ꢇꢈ ꢉꢊꢋ ꢌꢁ ꢌꢉ ꢍꢁꢎ ꢉ ꢏꢋ ꢎ ꢋꢐꢑ ꢉ ꢊꢍꢎꢒ ꢐ  
SLUS195B − MARCH 1997 − REVISED NOVEMBER 2003  
}  
absolute maximum ratings over operating free-air temperature (unless otherwise noted)  
Termpwr voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
Signal line voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 7 V  
Regulator output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 A  
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
Operating temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 150°C  
Lead temperature (soldering, 10 sec.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
Unless otherwise specified all voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Consult  
Packaging Section of Unitrode Integrated Circuits databook for thermal limitations and considerations of packages.  
recommended operating conditions  
Termpwr voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.8 V to 5.25 V  
Signal line voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 5 V  
Disconnect input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to Termpwr  
electrical characteristics, these specifications apply for T = 0°C to 70°C. TRMPWR = 4.75 V  
A
DISCNCT = 0 V, T = T , (unless otherwise stated)  
A
J
supply current section  
PARAMETER  
TEST CONDITIONS  
All termination lines = Open  
MIN  
TYP  
12  
MAX  
18  
UNITS  
mA  
Termpwr supply current  
Power down mode  
All termination lines = 0.5 V  
DISCNCT = Open  
200  
100  
220  
150  
mA  
µA  
output section (terminator lines)  
PARAMETER  
TEST CONDITIONS  
= −5 mA to −15 mA  
MIN  
107  
2.7  
TYP  
110  
2.9  
MAX  
UNITS  
Terminator impedance  
Output high voltage  
I  
113  
LINE  
V
V
V
= 4 V,  
See Note 1  
V
TRMPWR  
T = 25°C  
−21.1 −21.9 −22.4  
−20.5 −21.9 −22.4  
−20.3 −21.9 −22.4  
−19.8 −21.9 −22.4  
−22.0 −24.0 −25.4  
mA  
mA  
mA  
mA  
mA  
V
J
Max output current  
= 0.5 V  
LINE  
0°C < T < 70°C  
J
T = 25°C  
J
= 0.5 V,  
TRMPWR = 4 V,  
LINE  
See Note 1  
0°C < T < 70°C  
Max output current  
Output clamp level  
J
V
= 0.2 V,  
LINE  
= −30 mA  
TRMPWR = 4.0 V to 5.25 V  
0°C < T < 70°C  
J
I
−0.2 −0.05  
10  
0.1  
400  
100  
LINE  
V
V
= 0 to 4 V  
= 5.25 V  
nA  
LINE  
TRMPWR = 0 V to 5.25,  
VREG = 0 V  
µA  
LINE  
Output leakage  
DISCNCT = 4 V  
TRMPWR = 0 V to 5.25 V,  
REG = Open  
10  
6
400  
8
nA  
pF  
V
LINE  
= 0 V to 5.25 V  
Output capacitance  
DISCNCT = Open  
See Note 2  
DP Package  
NOTES: 1. Measuring each termination line while other 8 are low (0.5 V).  
2. Ensured by design. Not production tested.  
3
www.ti.com  
ꢀ ꢁꢂꢃ ꢄꢅ  
ꢆꢇ ꢈ ꢉ ꢊꢋ ꢌꢁ ꢌꢉ ꢍ ꢁꢎ ꢉ ꢏꢋ ꢎꢋ ꢐ ꢑꢉ ꢊꢍꢎꢒ ꢐ  
SLUS195B − MARCH 1997 − REVISED NOVEMBER 2003  
regulator section  
PARAMETER  
TEST CONDITIONS  
MIN  
2.8  
2.8  
TYP  
2.9  
MAX  
UNITS  
Regulator output voltage  
3
V
V
Regulator output voltage  
Line regulation  
All termination lines = 5 V  
TRMPWR = 4 V to 6 V  
= 100 mA to −100 mA  
2.9  
10  
3
20  
50  
1
mV  
mV  
V
Load regulation  
I
20  
REG  
All termination lines = 0.5 V  
Drop out voltage  
0.7  
Short circuit current  
Sinking current capability  
Thermal shutdown  
V
V
= 0 V  
−200 −400 −600  
mA  
mA  
°C  
°C  
REG  
= 3.5 V  
200  
400  
170  
10  
600  
REG  
Thermal shutdown hysteresis  
disconnect section  
PARAMETER  
Disconnect threshold  
Threshold hysteresis  
Input current  
TEST CONDITIONS  
MIN  
1.3  
TYP  
1.5  
160  
10  
MAX  
1.7  
UNITS  
V
100  
250  
15  
mV  
DISCNCT = 0 V  
mA  
APPLICATION INFORMATION  
UDG-94050  
Figure 1. Typical Wide SCSI Bus Configurations Utilizing 1 UC5601 and 1 UC5603 Device  
4
www.ti.com  
ꢀ ꢁꢂ ꢃꢄ ꢅ  
ꢆ ꢇꢈ ꢉꢊꢋ ꢌꢁ ꢌꢉ ꢍꢁꢎ ꢉ ꢏꢋ ꢎ ꢋꢐꢑ ꢉ ꢊꢍꢎꢒ ꢐ  
SLUS195B − MARCH 1997 − REVISED NOVEMBER 2003  
APPLICATION INFORMATION  
UDG-94051  
Figure 2. Typical Wide SCSI Bus Configurations Utilizing 3 UC5603 Devices  
5
www.ti.com  
PACKAGE OPTION ADDENDUM  
www.ti.com  
7-Oct-2013  
PACKAGING INFORMATION  
Orderable Device  
UC5603DP  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
0 to 70  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
LIFEBUY  
SOIC  
SOIC  
D
16  
16  
40  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
Level-2-260C-1 YEAR  
UC5603DP  
UC5603DPG4  
LIFEBUY  
D
40  
Green (RoHS  
& no Sb/Br)  
Level-2-260C-1 YEAR  
0 to 70  
UC5603DP  
UC5603DPR  
UC5603DPRTR  
UC5603DPTR  
UC5603DPTRG4  
UC5603J  
NRND  
NRND  
SOIC  
SOIC  
SOIC  
SOIC  
CDIP  
PLCC  
D
D
16  
16  
16  
16  
16  
28  
TBD  
TBD  
TBD  
TBD  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
0 to 70  
0 to 70  
0 to 70  
0 to 70  
0 to 70  
0 to 70  
OBSOLETE  
OBSOLETE  
OBSOLETE  
NRND  
D
UC5603DP  
UC5603QP  
D
J
UC5603QPTR  
FN  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
7-Oct-2013  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
MECHANICAL DATA  
MPLC004A – OCTOBER 1994  
FN (S-PQCC-J**)  
PLASTIC J-LEADED CHIP CARRIER  
20 PIN SHOWN  
Seating Plane  
0.004 (0,10)  
0.180 (4,57) MAX  
0.120 (3,05)  
D
0.090 (2,29)  
D1  
0.020 (0,51) MIN  
3
1
19  
0.032 (0,81)  
0.026 (0,66)  
4
18  
D2/E2  
D2/E2  
E
E1  
8
14  
0.021 (0,53)  
0.013 (0,33)  
0.050 (1,27)  
9
13  
0.007 (0,18)  
M
0.008 (0,20) NOM  
D/E  
D1/E1  
D2/E2  
NO. OF  
PINS  
**  
MIN  
0.385 (9,78)  
MAX  
MIN  
MAX  
MIN  
MAX  
0.395 (10,03)  
0.350 (8,89)  
0.356 (9,04)  
0.141 (3,58)  
0.191 (4,85)  
0.291 (7,39)  
0.341 (8,66)  
0.169 (4,29)  
0.219 (5,56)  
0.319 (8,10)  
0.369 (9,37)  
20  
28  
44  
52  
68  
84  
0.485 (12,32) 0.495 (12,57) 0.450 (11,43) 0.456 (11,58)  
0.685 (17,40) 0.695 (17,65) 0.650 (16,51) 0.656 (16,66)  
0.785 (19,94) 0.795 (20,19) 0.750 (19,05) 0.756 (19,20)  
0.985 (25,02) 0.995 (25,27) 0.950 (24,13) 0.958 (24,33) 0.441 (11,20) 0.469 (11,91)  
1.185 (30,10) 1.195 (30,35) 1.150 (29,21) 1.158 (29,41) 0.541 (13,74) 0.569 (14,45)  
4040005/B 03/95  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. Falls within JEDEC MS-018  
1
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