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产品型号UPB1502GR的Datasheet PDF文件预览

DATA SHEET  
BIPOLAR DIGITAL INTEGRATED CIRCUITS  
µPB1502GR, 1502GR(1)  
1.7 GHz/ 2.0 GHz LOW-POWER TWO-MODULUS PRESCALER  
DIVIDED-BY-64/65, 128/129  
FEATURES  
High toggle frequency – 2.0 GHz: µPB1502GR(1), 1.7 GHz: µPB1502GR  
Low power consumption – 6.7 mA TYP. at 3 V  
Operating supply voltage – 2.7 V to 3.3 V  
High input sensitivity – 130 to 220 mVP-P: µPB1502GR(1), 100 to 320 mVP-P: µPB1502GR (@50 )  
Equipped with power-save function: 5 µA (standard) on power-save mode.  
Packaged in 8 pins plastic SOP suitable for surface mounting.  
DESCRIPTION  
µPB1502GR and µPB1502GR(1) are two-modulus prescaler divided by 64/65 or 128/129. This device is designed for  
mobile communication applications for example 0.8-1.9 GHz cellular and cordless telephones. The ICs operate on low power  
and therefore are suitable for hand-held, battery-operated systems.  
These products are manufactured using NEC’s 20 GHz fT NESAT™ III silicon bipolar process. This process uses silicon  
nitride passivation film and gold metallization wirings. These materials can protect the chips from external pollution and  
prevent corrosion and migration. Thus, these products have excellent performance, uniformity and reliability.  
ORDER INFORMATION  
ORDER NUMBER  
PACKAGE  
SUPPLYING FORM  
fin MAX.  
µPB1502GR–E1  
8 pin plastic SOP  
(225 mil)  
Embossed tape 12 mm wide. QTY 2.5 k/reel  
Pin1 is in tape pull-out direction.  
1.7 GHz  
2.0 GHz  
µPB1502GR(1)–E1  
Remarks Toorderevaluationsamples,pleasecontactyourlocalNECsalesoffice.(Ordernumber:µPB1502GR,µPB1502GR(1))  
Caution electro-static sensitive devices  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for availability  
and additional information.  
Document No. P10871EJ3V0DS00 (3rd edition)  
Date Published October 1999 N CP(K)  
Printed in Japan  
The mark  
shows major revised points.  
1996, 1999  
©
µPB1502GR, 1502GR(1)  
PIN ASSIGNMENT  
(Top View)  
IN  
IN  
V
CC  
V
PS  
SW  
M
OUT  
GND  
INTERNAL BLOCK DIAGRAM  
(2) VCC  
(7) VPS  
(5) GND  
D
Q
Q
D
Q
Q
D
Q
Q
CK  
CK  
CK  
CK  
CK  
CK  
M(6)  
DFF1  
DFF2  
DFF3  
(8)IN  
(1)IN  
OR  
T
Q
T
Q
T
Q
T
Q
T
Q
SW  
TFF1  
TFF2  
TFF3  
TFF4  
TFF5  
OUT(4)  
AMP  
SW(3)  
: pin  
( ) : pin No.  
2
Data Sheet P10871EJ3V0DS00  
µPB1502GR, 1502GR(1)  
ABSOLUTE MAXIMUM RATINGS  
PARAMETER  
Supply voltage  
SYMBOL  
VCC  
RATINGS  
–0.5 to +6  
UNIT  
CONDITION  
V
V
TA = +25 °C  
Input voltage  
VIN  
–0.5 to VCC +0.5  
TA = +25 °C  
Mounted on double sided copper clad 50 ×  
50 × 1.6 mm epoxy glass PWB (TA = +85 °C)  
Total power dissipation  
PD  
250  
mW  
Operating temperature  
Storage temperature  
Topt  
Tstg  
–40 to +85  
°C  
°C  
–65 to +150  
RECOMMENDED OPERATING RANGE  
PARAMETER  
Supply voltage  
Operating temperature  
SYMBOL  
MIN.  
2.7  
TYP.  
MAX.  
UNIT  
V
VCC  
Topt  
3.0  
3.3  
–40  
+25  
+85  
°C  
ELECTRICAL CHARACTERISTICS (TA = 40 to +85 °C, VCC = 2.7 to 3.3 V)  
µPB1502GR  
TYP. MAX.  
µPB1502GR(1)  
PARAMETER  
SYMBOL  
UNIT  
CONDITION  
MIN.  
0.5  
MIN.  
TYP.  
MAX.  
Response frequency  
fin  
1.7  
0.5  
3.2  
2.0  
GHz  
mA  
Pin = –10 dBm  
VPSH level,  
No input signal  
Circuit current  
ICC  
3.2  
6.7  
11.0  
6.7  
11.0  
Input power sensitivity 1  
Pin1  
Pin2  
Pin3  
Pin4  
VIH1  
VIL1  
VIH2  
VIL2  
VOUT  
tset  
–11  
–15  
–15  
0
0
–11  
–15  
–15  
–14  
2.5  
0
0
dBm  
dBm  
dBm  
dBm  
V
fin = 0.5 to 0.8 GHz  
fin = 0.8 to 1.5 GHz  
fin = 1.5 to 1.7 GHz  
fin = 1.7 to 2.0 GHz  
Input power sensitivity 2  
Input power sensitivity 3  
–6  
–1  
–9  
Input power sensitivity 4  
Modulus control input high (M)  
Modulus control input low (M)  
Divide ratio control input high (SW)  
Divide ratio control input low (SW)  
Output voltage swing  
2.5  
0.8  
VCC  
0.8  
VCC  
V
VCC  
VCC  
VCC  
VCC  
V
OPEN OPEN OPEN OPEN OPEN OPEN  
V
0.8  
11  
VCC  
0.8  
11  
VCC  
VP–P  
ns  
CL = 8 pF  
finMAX.  
Modulus set up time  
Power-save input high  
VPSH  
VinL  
IPS  
VCC  
VCC  
0.8  
20  
VCC  
VCC  
0.8  
20  
V
Power-save input low  
V
VPSL level  
VPSL level  
*
*
Circuit current on power-save mode  
5
5
µA  
* Standard reference value on power-save mode.  
3
Data Sheet P10871EJ3V0DS00  
µPB1502GR, 1502GR(1)  
PIN DESCRIPTIONS  
Functions and Explanation  
Pin No.  
1
Symbol  
IN  
Assignment  
Input frequency from an external VCO output.  
Frequency input pin  
Must be coupled with capacitor (e.g. 1 000 pF) for DC cut.  
Supply voltage 3.0 ± 0.3 V for operation. Must be connected bypass  
capacitor (e.g. 1 000 pF) to minimize ground impedance.  
2
3
6
VCC  
SW  
M
Power supply pin  
Divided ratio and modulus control can be governed by following input  
data to these pins.  
Divided ratio  
control input pin  
M
Modulus  
control input pin  
H
L
H
L
1/64  
1/128  
1/65  
1/129  
SW  
This frequency output can be interfaced to CMOS PLL.  
Must be coupled with capacitor (e.g. 1 000 pF) for DC cut.  
4
5
OUT  
GND  
Divided frequency  
output pin  
Must be connected to the system ground with minimum inductance.  
Ground pattern on the board should be formed as wide as possible.  
(Track length should be kept as short as possible).  
Ground pin  
ON/OFF-operation control can be governed by following input data to  
this pin.  
7
VPS  
Power-save  
function pin  
Operation  
H
L
ON  
VPS  
OFF  
Must be connected bypass capacitor (e.g. 1 000 pF) to minimize  
ground impedance.  
8
IN  
Frequency-input  
bypass pin  
4
Data Sheet P10871EJ3V0DS00  
µPB1502GR, 1502GR(1)  
TEST CIRCUIT  
1 000 pF  
C1  
1 000 pF  
C8  
IN  
IN  
VPS  
50 Ω  
50 Ω  
VCC  
SW  
OUT  
1 000 pF  
2.7 to 3.0 V  
C2  
1 000 pF  
C7  
S.G.  
2.7 to 3.0 V  
M
1 000 pF C3  
C6  
3.0 to 0 V  
3.0 to 0 V  
1 000  
GND  
pF  
1 000 pF  
1 MΩ  
C4  
Oscillo-  
Scope  
3 pF  
C5  
5 pF  
M
H
L
H
L
1/64  
1/128  
1/65  
1/129  
SW  
APPLICATION CIRCUIT FOR REFERENCE  
1 000 pF  
MIX  
1 000 pF  
( PB1502GR)  
µ
1 000 pF  
1 000 pF  
1 000 pF  
IN  
IN  
VCO  
1 000 pF  
V
CC  
V
PS  
1 000  
pF  
1 000 pF  
1 000 pF  
SW  
M
VT  
OUT GND  
TCXO  
REF  
1 000 pF  
Buffer Amp.  
2SC4093  
M
EN  
f
IN  
µ
( PC2745T)  
PLL  
DATA  
CPU  
CLOCK  
CP  
GND  
V
CC  
LPF  
1 000 pF  
1 000 pF  
The application circuits and their parameters are for references only and are not intended for use in actual design-in's.  
To know the real application circuits, please refer to PLL synthesizer LSI's documentations (e.g.µPD3160GS).  
5
Data Sheet P10871EJ3V0DS00  
µPB1502GR, 1502GR(1)  
TIMING DIAGRAM  
Divided by 64/65 SW ’H’  
(Divided by 128/129 SW ’L’)  
64 clocks  
(128)  
65 clocks  
(129)  
IN  
32 clocks  
(64)  
32 clocks  
(64)  
32 clocks  
(64)  
33 clocks  
(65)  
OUT  
32  
(64)  
32  
(64)  
32  
(64)  
32  
(64)  
32  
(64)  
32  
(64)  
32  
(64)  
32  
(64)  
33  
(65)  
32  
(64)  
33  
(65)  
33  
(65)  
Hi  
M
t
set  
LO  
t
set = The minimum time required between ‘Modulus Control’ going low and next output rising edge, in order to ensure a P+1  
modulus change.  
6
Data Sheet P10871EJ3V0DS00  
µPB1502GR, 1502GR(1)  
ILLUSTRATION OF THE TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD  
IN  
IN  
C8  
1pin  
VCC  
VPS  
M
SW  
GND  
OUT  
Component List  
Note  
(1) 50 × 50 × 0.4 mm double copper clad polyimide board.  
(2) Back side: GND pattern  
No.  
C1 to 4  
C5  
Value  
1 000 pF  
8 pF  
(3) Solder plated on pattern  
(4)  
: Through holes  
C6 to 8  
1 000 pF  
7  
Data Sheet P10871EJ3V0DS00  
µPB1502GR, 1502GR(1)  
TYPICAL CHARACTERISTICS (TA = +25 °C)  
µPB1502GR, µPB1502GR(1) in common —  
CIRCUIT CURRENT vs. SUPPLY VOLTAGE  
14  
µ
PB1502GR  
µ
PB1502GR(1)  
: T  
A
: TA  
: TA  
= +85 °C  
= +25 °C  
= –40 °C  
12  
10  
8
6
4
2
0
2
4
6
Supply Voltage VCC (V)  
OUTPUT VOLTAGE SWING  
vs. SUPPLY VOLTAGE  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
µ
PB1502GR  
PB1502GR(1)  
µ
: T  
: T  
: T  
A
A
A
= +85 °C  
= +25 °C  
= –40 °C  
2.4  
2.6  
2.8  
3.0  
3.2  
3.4  
3.6  
Supply Voltage VCC (V)  
S11 vs. f  
V
CC = 3.0 V, ICC = 6.7 mA, Z = 50 W  
O
0.5 GHz  
2.0 GHz  
1.0 GHz  
8
Data Sheet P10871EJ3V0DS00  
µPB1502GR, 1502GR(1)  
<
>
<
>
µ
PB1502GR — Left line  
µ
PB1502GR(1) — Right line  
INPUT POWER vs. FREQUENCY  
INPUT POWER vs. FREQUENCY  
+60  
+40  
+20  
0
+60  
+40  
+20  
0
µ
PB1502GR  
µ
PB1502GR(1)  
T
A
= +25 °C  
T
A
= +25 °C  
: VCC = 2.7 V  
: VCC = 3.0 V  
: VCC = 3.3 V  
: VCC = 2.7 V  
: VCC = 3.0 V  
: VCC = 3.3 V  
*
*
–20  
–40  
–60  
–20  
–40  
–60  
0.2  
0.2  
0.2  
0.6  
1.2  
1.6  
2.0  
2.4  
0.2  
0.2  
0.2  
0.6  
1.2  
1.6  
2.0  
2.4  
Input Frequency f (GHz)  
Input Frequency f (GHz)  
INPUT POWER vs. FREQUENCY  
INPUT POWER vs. FREQUENCY  
+60  
+40  
+20  
0
+60  
+40  
+20  
0
µ
T
PB1502GR  
= +85 °C  
: VCC = 2.7 V  
: VCC = 3.0 V  
: VCC = 3.3 V  
µ
T
PB1502GR(1)  
= +85 °C  
: VCC = 2.7 V  
: VCC = 3.0 V  
: VCC = 3.3 V  
A
A
*
*
–20  
–40  
–60  
–20  
–40  
–60  
0.6  
1.2  
1.6  
2.0  
2.4  
0.6  
1.2  
1.6  
2.0  
2.4  
Input Frequency f (GHz)  
Input Frequency f (GHz)  
INPUT POWER vs. FREQUENCY  
INPUT POWER vs. FREQUENCY  
+60  
+40  
+20  
0
+60  
+40  
+20  
0
µ
T
PB1502GR  
= –40 °C  
: VCC = 2.7 V  
: VCC = 3.0 V  
: VCC = 3.3 V  
µ
T
PB1502GR(1)  
= –40 °C  
: VCC = 2.7 V  
: VCC = 3.0 V  
: VCC = 3.3 V  
A
A
*
*
–20  
–40  
–60  
–20  
–40  
–60  
0.6  
1.2  
1.6  
2.0  
2.4  
0.6  
1.2  
1.6  
2.0  
2.4  
Input Frequency f (GHz)  
Input Frequency f (GHz)  
*
Guaranteed Operating Window  
9
Data Sheet P10871EJ3V0DS00  
µPB1502GR, 1502GR(1)  
TYPICAL SYSTEM APPLICATION  
Digital Cellular System Block Diagram  
Low Noise Tr  
Downconverter  
I
RX  
DEMO.  
Q
µ
PD3160  
PLL  
V
CC  
÷N  
PLL  
SW  
µ
PB1502  
I
0°  
φ
TX  
90°  
PA  
Driver  
Q
Other applicable systems  
1.9 GHz digital cordless telephone, hand-held radio.  
10  
Data Sheet P10871EJ3V0DS00  
µPB1502GR, 1502GR(1)  
PACKAGE DIMENSIONS  
8 PIN PLASTIC SOP (225 mil) (UNIT: mm)  
8
5
detail of lead end  
+7°  
3°  
3°  
1
4
5.2 ± 0.2  
6.5 ± 0.3  
4.4 ± 0.15  
1.57 ± 0.2  
1.1 ± 0.2  
1.49  
0.85 MAX.  
0.6 ± 0.2  
0.10  
+0.08  
0.07  
1.27  
0.17  
+0.08  
0.07  
0.42  
M
0.12  
0.1 ± 0.1  
Each lead centerline is located within 0.12 mm of its true position (T.P.) at maximum material condition.  
NOTE  
11  
Data Sheet P10871EJ3V0DS00  
µPB1502GR, 1502GR(1)  
NOTE ON CORRECT USE  
(1) Observe precautions for handling because of electro-static sensitive devices.  
(2) Form a ground pattern as wide as possible to minimize ground impedance (to prevent abnormal operation).  
(3) Keep the wiring length of the ground pins as short as possible.  
(4) Connect a bypass capacitor (e.g. 1 000 pF) to the VCC pin.  
RECOMMENDED SOLDERING CONDITIONS  
This product should be soldered in the following recommended conditions. Other soldering methods and conditions than  
the recommended conditions are to be consulted with our sales representatives.  
µPB1502GR, 1502GR(1)  
Recommended  
Soldering method  
Infrared ray reflow  
Soldering conditions  
Package peak temperature: 235 °C,  
condition symbol  
Hour: within 30 s. (more than 210 °C),  
Time: 3 times, Limited days: no.*  
IR35–00-3  
VPS  
Package peak temperature: 215 °C,  
Hour: within 40 s. (more than 200 °C),  
Time: 3 times, Limited days: no.*  
VP15–00-3  
WS60–00-1  
Wave soldering  
Pin part heating  
Soldering tub temperature: less than 260 °C,  
Hour: within 10 s.  
Time: 1 time, Limited days: no.  
Pin area temperature: less than 300 °C,  
Hour: within 3 s./pin  
Limited days: no.*  
*: It is the storage days after opening a dry pack, the storage conditions are 25 °C, less than 65 % RH.  
Note 1. The combined use of soldering method is to be avoided (However, except the pin area heating method).  
Fordetailsofrecommendedsolderingconditionsforsurfacemounting,refertoinformationdocumentSEMICONDUCTOR  
DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).  
12  
Data Sheet P10871EJ3V0DS00  
µPB1502GR, 1502GR(1)  
[MEMO]  
13  
Data Sheet P10871EJ3V0DS00  
µPB1502GR, 1502GR(1)  
[MEMO]  
14  
Data Sheet P10871EJ3V0DS00  
µPB1502GR, 1502GR(1)  
[MEMO]  
15  
Data Sheet P10871EJ3V0DS00  
µPB1502GR, 1502GR(1)  
ATTENTION  
OBSERVE PRECAUTIONS  
FOR HANDLING  
ELECTROSTATIC  
SENSITIVE  
DEVICES  
NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation.  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
No part of this document may be copied or reproduced in any form or by any means without the prior written  
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in  
this document.  
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property  
rights of third parties by or arising from use of a device described herein or any other liability arising from use  
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other  
intellectual property rights of NEC Corporation or others.  
Descriptions of circuits, software, and other related information in this document are provided for illustrative  
purposes in semiconductor product operation and application examples. The incorporation of these circuits,  
software, and information in the design of the customer's equipment shall be done under the full responsibility  
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third  
parties arising from the use of these circuits, software, and information.  
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,  
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or  
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety  
measures in its design, such as redundancy, fire-containment, and anti-failure features.  
NEC devices are classified into the following three quality grades:  
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a  
customer designated “quality assurance program“ for a specific application. The recommended applications of  
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device  
before using it in a particular application.  
Standard: Computers, office equipment, communications equipment, test and measurement equipment,  
audio and visual equipment, home electronic appliances, machine tools, personal electronic  
equipment and industrial robots  
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster  
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed  
for life support)  
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life  
support systems or medical equipment for life support, etc.  
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.  
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,  
they should contact an NEC sales representative in advance.  
M7 98.8  
配单直通车
UPB1502GR产品参数
型号:UPB1502GR
生命周期:Obsolete
包装说明:SOIC-8
Reach Compliance Code:unknown
风险等级:5.83
Is Samacsys:N
系列:UPB15
JESD-30 代码:R-PDSO-G8
逻辑集成电路类型:PRESCALER
功能数量:1
端子数量:8
封装主体材料:PLASTIC/EPOXY
封装代码:SOP
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE
认证状态:Not Qualified
座面最大高度:1.8 mm
标称供电电压 (Vsup):3 V
表面贴装:YES
端子形式:GULL WING
端子节距:1.27 mm
端子位置:DUAL
宽度:4.4 mm
Base Number Matches:1
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