VN610SP-E
Figure 8. Application Schematic
+5V
V
CC
R
prot
INPUT
D
ld
R
prot
µC
OUTPUT
CURRENT SENSE
R
SENSE
GND
R
GND
V
GND
D
GND
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift ( 600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
Series resistor in INPUT line is also required to prevent
that, during battery voltage transient, the current exceeds
the Absolute Maximum Rating.
Safest configuration for unused INPUT pin is to leave it
unconnected, while unused SENSE pin has to be
connected to Ground pin.
GND PROTECTION NETWORK AGAINST
REVERSE BATTERY
Solution 1: Resistor in the ground line (R
can be used with any type of load.
only). This
GND
The following is an indication on how to dimension the
R
resistor.
GND
1) R
2) R
≤ 600mV / (I
).
GND
GND
S(on)max
≥ (−V ) / (-I
)
GND
CC
where -I
is the DC reverse ground pin current and can
GND
be found in the absolute maximum rating section of the
device’s datasheet.
LOAD DUMP PROTECTION
Power Dissipation in R
(when V <0: during reverse
CC
GND
battery situations) is:
D
is necessary (Voltage Transient Suppressor) if the
ld
2
load dump peak voltage exceeds V
max DC rating.
CC
P = (-V ) /R
D
CC
GND
The same applies if the device will be subject to
transients on the V
shown in the ISO T/R 7637/1 table.
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
line that are greater than the ones
CC
calculated with formula (1) where I
becomes the
S(on)max
µC I/Os PROTECTION:
sum of the maximum on-state currents of the different
devices.
If a ground protection network is used and negative
Please note that if the microprocessor ground is not
transients are present on the V line, the control pins will
CC
common with the device ground then the R
will
be pulled negative. ST suggests to insert a resistor (R
in line to prevent the µC I/Os pins to latch-up.
)
GND
prot
produce a shift (I
* R
) in the input thresholds
GND
S(on)max
and the status output values. This shift will vary
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up
limit of µC I/Os.
depending on how many devices are ON in the case of
several high side drivers sharing the same R
.
GND
If the calculated power dissipation leads to a large
resistor or several devices have to share the same
resistor then the ST suggests to utilize Solution 2 (see
below).
-V
/I
≤ R
≤ (V
-V -V
OHµC IH GND
) / I
CCpeak latchup
prot
IHmax
Calculation example:
For V
= - 100V and I
≥ 20mA; V
≥ 4.5V
CCpeak
latchup
OHµC
Solution 2: A diode (D
) in the ground line.
GND
5kΩ ≤ R
≤ 65kΩ.
prot
A resistor (R
GND
=1kΩ) should be inserted in parallel to
GND
D
if the device will be driving an inductive load.
Recommended R
value is 10kΩ.
prot
9/18