欢迎访问ic37.com |
会员登录 免费注册
发布采购
所在地: 型号: 精确
  • 批量询价
  •  
  • 供应商
  • 型号
  • 数量
  • 厂商
  • 封装
  • 批号
  • 交易说明
  • 询价
更多
  • YMF719-S图
  • 集好芯城

     该会员已使用本站13年以上
  • YMF719-S
  • 数量15402 
  • 厂家YAMAHA 
  • 封装QFP 
  • 批号最新批次 
  • 原厂原装公司现货
  • QQ:3008092965QQ:3008092965 复制
    QQ:3008092965QQ:3008092965 复制
  • 0755-83239307 QQ:3008092965QQ:3008092965
  • YMF719-S图
  • 深圳市华芯盛世科技有限公司

     该会员已使用本站13年以上
  • YMF719-S
  • 数量865000 
  • 厂家YAMAHA 
  • 封装原厂封装 
  • 批号最新批号 
  • 一级代理,原装特价现货!
  • QQ:2881475757QQ:2881475757 复制
  • 0755-83225692 QQ:2881475757
  • YMF719-S图
  • 深圳市一线半导体有限公司

     该会员已使用本站16年以上
  • YMF719-S
  • 数量15000 
  • 厂家YAMAHA 
  • 封装TQFP 
  • 批号 
  • 全新原装部分现货其他订货
  • QQ:2881493920QQ:2881493920 复制
    QQ:2881493921QQ:2881493921 复制
  • 0755-88608801多线 QQ:2881493920QQ:2881493921
  • YMF719-SA2图
  • 深圳市一线半导体有限公司

     该会员已使用本站11年以上
  • YMF719-SA2
  • 数量15000 
  • 厂家原厂品牌 
  • 封装原厂外观 
  • 批号 
  • 全新原装部分现货其他订货
  • QQ:2881493920QQ:2881493920 复制
    QQ:2881493921QQ:2881493921 复制
  • 0755-88608801多线 QQ:2881493920QQ:2881493921
  • YMF719-S图
  • 上海熠富电子科技有限公司

     该会员已使用本站15年以上
  • YMF719-S
  • 数量9000 
  • 厂家YAMAHA 
  • 封装N/A 
  • 批号2024 
  • 上海原装现货库存,欢迎查询!
  • QQ:2719079875QQ:2719079875 复制
    QQ:2300949663QQ:2300949663 复制
  • 15821228847 QQ:2719079875QQ:2300949663
  • YMF719-S图
  • 深圳市毅创腾电子科技有限公司

     该会员已使用本站16年以上
  • YMF719-S
  • 数量2500 
  • 厂家YAMAHA 
  • 封装QFP 
  • 批号22+ 
  • ★只做原装★正品现货★原盒原标★
  • QQ:2355507168QQ:2355507168 复制
    QQ:2355507169QQ:2355507169 复制
  • 86-755-83219286 QQ:2355507168QQ:2355507169
  • YMF719-S图
  • 深圳市励创源科技有限公司

     该会员已使用本站2年以上
  • YMF719-S
  • 数量35600 
  • 厂家YAMAHA 
  • 封装QFP 
  • 批号21+ 
  • 诚信经营,原装现货,假一赔十,欢迎咨询15323859243
  • QQ:815442201QQ:815442201 复制
    QQ:483601579QQ:483601579 复制
  • -0755-82711370 QQ:815442201QQ:483601579

产品型号YMF721的Datasheet PDF文件预览

YMF721  
OPL4-ML2  
FM + Wavetable Synthesizer LSI  
OVERVIEW  
YMF721 (OPL4-ML2) is a high quality and low cost Wavetable synthesizer LSI. YMF721 (OPL4-ML2)  
integrates an OPL3 (FM synthesizer), General MIDI processor and 1 Mbyte Wavetable sample ROM into one  
chip, and complies with General MIDI (GM) system level 1. Thus, it is best suited to multimedia applications,  
sound cards, MIDI synthesis modules and other sound applications.  
Since this LSI outputs stereophonic 16 bit digital signal (fs = 44.1 kHz), it can be connected directly with  
YMF701B, 711 or 715 (OPL3-SA, SA2 or SA3) or with YAC516(DAC16-L).  
Operating voltage, 3.3 V, allows this LSI to be controlled with notebook personal computers.  
Power management functions (power down and suspend/resume functions) of OPL4-ML2 contribute to low  
power consumption of personal computers into which this product is built-in.  
FEATURES  
• The Wavetable synthesizer of this LSI is able to generate up to 24 types of sounds simultaneously.  
• Has an interface that makes this LSI compatible with MPU-401 UART mode.  
• Has an OPL3 (FM synthesizer) for AdLib/Sound Blaster applications.  
• Has a 1 Mbyte built-in Wavetable sample ROM.  
• Complies with GM system Level 1. (Thus, it is compatible with DOS applications that support MPU-401.)  
• MIDI signal can be transmitted either through serial input or parallel input.  
• FM synthesizer and Wavetable synthesizer of this LSI can generate their sound at the same time.  
• FM synthesizer is register-compatible with OPL3.  
• All registers are readable.  
• Power management functions included power down and suspend/resume can be supported.  
• Frequency of master clock signal is 33.8688 MHz.  
• Pin compatible with YMF704C-S (100 pin SQPF)  
• Voltage of power supply can be 5.0 V or 3.3 V.  
• Silicone gate CMOS process  
• 100-pin SQFP (YMF721-S).  
GENERAL MIDI logo is a trademark of Association of Musical Electronics Industry (AMEI), and  
indicates GM system level 1 Compliant.  
CORPORATION  
YAMAHA  
YMF721 CATALOG  
CATALOG No.:LSI-4MF721A20  
Jury 10, 1997  
YMF721  
PIN CONFIGURATION  
YMF721-S  
VDD  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
VSS  
1
2
3
4
5
6
7
8
75  
74  
73  
72  
71  
70  
69  
68  
67  
66  
65  
64  
63  
62  
61  
60  
59  
58  
57  
56  
55  
54  
53  
52  
51  
VSS  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
N.C.  
VSS  
VDD  
N.C.  
VSS  
/TEST2  
/RESETSEL  
TD7  
TD6  
TD5  
TD4  
TD3  
TD2  
TD1  
TD0  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
100 pin SQFP Top View  
July 10, 1997  
- 2 -  
YMF721  
PIN DESCRIPTION  
ISA bus interface : 19 pins  
Pin name  
ADB7-0  
A2-0  
pins  
8
I/O  
Type  
TTL  
TTL  
TTL  
TTL  
TTL  
TTL  
Size  
Function  
I/O  
2mA  
Data bus  
3
I
I
I
I
I
-
-
-
-
-
Address bus  
/MPUCS  
/OPLCS  
/IOW  
1
MPU401 chip select  
FM/Wavetable/Command/Control chip select  
Write enable  
1
1
/IOR  
1
Read enable  
RST  
1
1
1
I
TTL  
TTL  
TTL  
-
Initial clear input  
AIRQ  
ABDIR  
O
O
2mA  
2mA  
Interrupt signal ("H" : Interrupt)  
Selection of data transfer direction  
(“L” : YMF721®Host)  
ARDY  
1
OD  
TTL  
12mA I/O channel ready/busy selection ("L" : Busy)  
MIDI interface : 2 pins  
Pin name  
RXD  
pins  
1
I/O  
Type  
TTL  
TTL  
Size  
Function  
I
I
-
-
MIDI serial data input  
FSP  
1
Selection of MIDI serial/parallel transmission  
(“H” : Parallel, “L” : Serial)  
Serial audio interface : 8 pins  
Pin name  
CLKO  
BCO  
pins  
1
I/O  
O
O
O
O
O
O
O
O
Type  
Size  
8mA  
2mA  
2mA  
2mA  
2mA  
2mA  
2mA  
2mA  
Function  
CMOS  
CMOS  
CMOS  
CMOS  
CMOS  
CMOS  
CMOS  
CMOS  
Clock output (384fs = 16.9344MHz)  
Bit clock output (48fs = 2.1168MHz)  
L/R clock output (fs = 44.1kHz)  
Word clock output (2fs = 88.2kHz)  
Effect send output  
1
LRO  
1
WCO  
DO3  
1
1
DO2  
1
MIX (FM + Wavetable) output  
Wavetable output  
DO1  
1
DO0  
1
FM output  
July 10, 1997  
- 3 -  
YMF721  
Others : 39 pins  
Pin name  
5V/3V  
pins  
I/O  
I
Type  
CMOS  
TTL  
Size  
Function  
1
1
-
-
Selection of power supply  
RST signal polarity control pin  
(When this pin is at "L", RST is active at "L".)  
/RESETSEL  
I+  
/PDOUT  
XI  
1
1
O
I
CMOS  
CMOS  
2mA  
2mA  
Power down control output  
Crystal oscillator connection or master clock input  
(33.8688 MHz)  
XO  
1
O
-
CMOS  
-
2mA  
-
Crystal oscillator connection pin  
To be open at normal use.  
N.C.  
34  
LSI test pins : 21 pins  
Pin name  
/TESTA  
/TESTB  
/TEST  
pins  
1
I/O  
I+  
I+  
I+  
I+  
I+  
O
Type  
TTL  
Size  
Function  
-
To be open at normal use.  
To be open at normal use.  
To be open at normal use.  
To be open at normal use.  
To be open at normal use.  
To be open at normal use.  
To be open at normal use.  
1
TTL  
-
1
TTL  
-
-
/TEST2  
1
TTL  
/TEST3  
1
TTL  
-
T7-0  
8
CMOS  
CMOS  
2mA  
2mA  
TD7-0  
8
I/O  
Power supply, ground : 11 pins  
Pin name  
VDD  
pins  
4
I/O  
Type  
Size  
Function  
-
-
-
-
-
-
Power supply (put on +5.0 V or +3.3V)  
Ground  
VSS  
7
Total : 100 pins  
Note : I+ : Input pin with built-in pull-up resistor, OD : Open drain output pin  
July 10, 1997  
- 4 -  
YMF721  
BLOCK DIAGRAM  
ADB[7-0]  
TEST  
Logic  
Wave ROM  
ISA BUS  
Interface  
A[2-0]  
/MPUCS,/OPLCS  
/IOW,/IOR  
RST  
1M byte  
Decode  
Logic  
DO3  
DO1  
Register  
Synthesizer  
Interface  
/RESETSEL  
FSP  
Wavetable  
Synthesizer  
Control  
(MPU/Command  
/Control)  
UART  
RXD  
(arbitration etc.)  
DO2  
Timing  
OPL3  
XI  
Generator  
XO  
FM Synthesizer  
DO0  
/PDOUT  
CLKO  
BCO  
LRO  
WCO  
Micro Processor  
MIDI Interpreter  
Command Interpreter  
SRAM  
ROM  
32kbit  
256kbit  
July 10, 1997  
- 5 -  
YMF721  
FUNCTIONS  
1. 1. Example of system configuration  
1-1. System with MPU401 UART  
This section describes two examples of systems that have an MPU401 UART in them.  
In these examples, YMF701B, 711 or 715 (OPL3-SA, SA2 or SA3) has a built-in MPU401 UART.  
(1) ISA BUS Connect System  
CLKO  
IOCHRDY  
RESETDRV  
SA2-0  
/IOW  
/IOR  
XI  
ARDY  
RST  
A2-0  
/IOW  
/IOR  
/SYNCS  
/EXTEN  
/OPLCS  
/MPUCS  
FSP  
RXD  
YMF7xx  
TXD  
(OPL3-SAx)  
ADB7-0  
ABDIR  
BCLK_ML  
LRCK_ML  
SIN_ML  
SD7-0  
BCO  
LRO  
DO2  
Note :  
YMF721 (OPL4-ML2) has MPU401 UART in it. Thus, for the above case, TXD of YMF7xx (OPL3-SAx)  
is connected with RXD of YMF721 (OPL4-ML2) and MPU401 port (/MPUCS) of YMF721 (OPL4-ML2)  
is disabled so that YMF7xx(OPL3-SAx) sends MIDI data directly to YMF721 (OPL4-ML2).  
For the above case, FM synthesizer of YMF7xx (OPL3-SAx) is disabled and the one in YMF721 (OPL4-  
ML2) is made active. (This control is made through /EXTEN pin of YMF7xx.) For the above system, the  
data bus that connects with YMF721(OPL4-ML2) gains access to FM-synthesizer/Command/Control port  
of YMF721(OPL4-ML2). (Chip select signal is outputted from /SYNCS pin of YMF7xx.)  
For the source of master clock to be inputted to XI pin of YMF721 (OPL4-ML2), it is recommended to use  
CLKO pin of YMF7xx (OPL3-SAx). For other methods, a crystal oscillator can be used by attaching it to  
XI and XO pins of YMF721 (OPL4-ML), or a clock of 33.8688 MHz supplied from the system can be used.  
When serial data outputs of YMF721 (OPL4-ML2), BCO, LRO and DO2 pins, are connected with external  
serial data interface (BCLK_ML, LRCK_ML, SIN_ML) of YMF7xx (OPL3-SAx), the serial data is  
converted to analog signal in YMF7xx (OPL3-SAx) and outputted as analog signal.  
July 10, 1997  
- 6 -  
YMF721  
(2) No ISA BUS Connect System  
ARDY  
RST  
/OPLCS  
RESET  
A2-0  
/IOW  
/IOR  
/MPUCS  
FSP  
RXD  
TXD  
YMF7xx  
(OPL3-SAx)  
/PDIN  
MCLK  
BCLK  
LRCK  
SDATA  
/PDOUT  
CLKO  
BCO  
LRO  
DO2  
AUX2L  
Lch  
Rch  
ADB7-0  
ABDIR  
AUX2R  
Note :  
YMF721 (OPL4-ML2) has MPU401 UART in it. Thus, for the above case, TXD of YMF7xx (OPL3-SAx)  
is connected with RXD of YMF721 (OPL4-ML2) and MPU401 port (/MPUCS) of YMF721 (OPL4-ML2)  
is disabled so that YMF7xx(OPL3-SAx) sends MIDI data directly to YMF721 (OPL4-ML2).  
The above system does not connect YMF721 (OPL4-ML2) and ISA bus, which is an example of Wavetable  
upgrade solution represented by the Wavetable daughter card. Input pins of the ISA bus interface should be  
pulled up externally. At this time, FM synthesizer/Command/Control ports are disabled, but the power  
down function is enabled by receiving System Exclusive Message on the MIDI data, except that  
Suspend/Resume function is disabled.  
As a source of master clock for YMF721 (OPL4-ML2), use a crystal oscillator by connecting it to XI and  
XO pins, or use the clock of 33.8688 MHz from the system. Connect BCO, LRO, DO2, /PDOUT and  
CLKO directly to YAC516 (DAC16-L) as shown to convert serial data output to analog signal. Then, it is  
recommended to input the converted analog signal to AUX2L and AUX2R of YMF7xx (OPL3-SAx) after  
amplifying the volume of source of YMF721 through the gain of +12 dB as shown for the purpose of  
equalizing the volumes of multiple sources.  
July 10, 1997  
- 7 -  
YMF721  
1-2. System without MPU401 UART  
This section describes an example of a system that does not have MPU401 UART in it.  
In this example, MPU401 UART of YMF721 (OPL4-ML2) is used.  
FM synthesizer of this LSI is compatible with applications that support AdLib/Sound Blaster, and Wavetable  
synthesizer is compatible with applications that support MPU401.  
IOCHRDY  
RESETDRV  
SA2-0  
ARDY  
RESET  
A2-0  
/OPLCS  
SA15-0  
AEN  
/MPUCS  
FSP  
/IOW  
/IOW  
/IOR  
RXD  
/IOR  
/PDIN  
MCLK  
BCLK  
LRCK  
SDATA  
/PDOUT  
CLKO  
BCO  
LRO  
DO2  
Lch out  
Rch out  
Lch  
Rch  
ADB7-0  
ABDIR  
SD7-0  
Note :  
For the above case, MPU401 port of YMF721 (OPL4-ML2) must be made active because the system does not  
have MPU401 UART in it. Addresses of standard ports through which reading or writing of registers of  
YMF721 (OPL4-ML2) is made are as follows.  
1) /OPLCS  
2) /MPUCS  
: 388 - 38Fh (8byte)  
: 330 - 331h (2byte)  
As a source of master clock for YMF721 (OPL4-ML2), use a crystal oscillator by connecting it to XI and  
XO pins, or use the clock of 33.8688 MHz from the system. Connect BCO, LRO, DO2, /PDOUT and  
CLKO directly to YAC516 (DAC16-L) as shown to convert serial data output to analog signal. Then, it is  
recommended to amplify the volume of source of YMF721 through the suitable gain as shown for the  
purpose of equalizing the volumes of multiple sources.  
July 10, 1997  
- 8 -  
YMF721  
2. ISA bus interface  
8 bit parallel I/O of YMF721 (OPL4-ML2) can be connected with ISA bus. The ISA bus interface allows  
transfer of commands between the each block of YMF721 (OPL4-ML2) and host.  
Data Bu s & Address Bu s  
ADB7-0  
A2-0  
: ISA data bus  
: ISA address bus  
/MPUCS  
/OPLCS  
/IOW  
: MPU401 chip select  
: FM/Wavetable/Command/Control chip select  
: ISA write enable  
/IOR  
: ISA read enable  
ABDIR  
ARDY  
: Data bus direction switching (“L” : YMF721 ® ISA)  
: I/O channel ready (“L” : busy)  
Control of the data bus is made with /MPUCS, /OPLCS, /IOW and /IOR signals. The mode of  
control of the data bus varies as follows according to the combination of states of the signals.  
The direction of data transfer on the data bus is determined by ABDIR. In normal operation, the  
internal data bus of YMF721 (OPL4-ML2) connects the built-in processor and FM/Wavetable  
synthesizer blocks. Every time the ISA bus accesses the register for FM/Wavetable, an internal  
arbitration circuit causes the internal bus to connect ISA bus and FM/Wavetable synthesizer  
blocks. YMF721 (OPL4-ML2) uses I/O channel ready (ARDY pin) as the internal arbitration  
circuit. ARDY becomes "L" (busy) every time data bus accesses the register for FM/Wavetable.  
/OPLCS /IOW  
/IOR  
L
A2  
A1  
L
A0  
L
MODE  
/MPUCS  
L
L
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
L
H
L
H
L
L
H
H
L
L
H
H
L
L
H
H
´
MPU401 Acknowledge (FEh)  
MPU401 MIDI Data write  
MPU401 Status read  
´
´
´
H
L
L
L
L
L
H
H
L
L
H
L
L
MPU401 Command write  
FM-synth. Status read  
FM-synth. Address write  
FM-synth. Data write  
´
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
H
H
H
H
´
L
H
H
L
H/L  
L
H
H
L
´
´
FM-synth. Data read  
L
L
Wavetable-synth. Status read  
Wavetable-synth. Address write  
Wavetable-synth. Data write  
Wavetable-synth. Data read  
Command response read  
Command write  
H
H
L
L
L
L
H
H
L
L
L
H
H
H
H
´
H
H
L
L
H
H
´
Control write  
Status read  
H
´
No-active or UART mode  
No-active or UART mode  
´
´
´
July 10, 1997  
- 9 -  
YMF721  
Notes:  
´ : Dont care  
When address has been written into FM block, the time required to wait until writing of address  
or data into Wavetable block is started is 0 (zero) nsec. When address has been written into  
Wavetable block, the time required to wait until writing of address or data into FM block is  
started is also 0 (zero) nsec. When FM block has been accessed, it is necessary to wait 860 nsec  
or more before the FM block can be accessed again.  
In terru pt  
AIRQ  
: Interrupt signal ("H" : Interrupt)  
YMF721 (OPL4-ML2) is able to provide one interrupt signal. There are two types of sources of  
this interrupt signal as follows.  
1) Two timer flags that are used for tempo counter of FM synthesizer  
2) The flag that occurs when internal processor writes data into the Command response register  
The flags described in 2) is disabled as a default.  
3. Serial audio interface  
YMF721 (OPL4-ML2) can be connected directly with an external DAC such as YAC516 through BCO,  
LRO, WCO and DO3-0 pins.  
BCO...  
LRO...  
Outputs bit clock. The frequency of this clock is 48 fs. (fs is the sampling  
frequency that is equal to the frequency of clock outputted from LRO.) Typical  
duty factor of this signal is 50 %.  
Specifies a channel for serial audio data. When LRO is "H", data is outputted  
from left channel, or when "L", from right channel. Frequency of this clock is  
44.1 kHz. Typical duty factor of this signal is 50 %.  
WCO...  
Frequency of this clock is 88.2 kHz. Typical duty factor of this signal is 50 %.  
These pins output serial audio data as follows.  
DO3-0...  
DO3...  
DO2...  
DO1...  
DO0...  
Outputs data of Wavetable whose effect send level has been adjusted.  
Outputs data that is the mixture of those of FM and Wavetable.  
Outputs Wavetable data.  
Outputs FM data.  
Format of the serial audio interface is as follows.  
24 BCO  
24 BCO  
BCO  
DO3-0  
LRO  
1
0
15 14 13 12 11 10  
9
8
7
6
5
4
3
2
1
0
15 14 13 12 11 10  
9 8 7 6 5 4 3 2 1 0  
Left Channel  
Right Channel  
WCO  
Format of YMF721 (OPL4-ML2) serial audio interface  
July 10, 1997  
- 10 -  
YMF721  
4. MIDI Interface  
MIDI serial data can be inputted from RXD pin. It is necessary to input MIDI data complied with MIDI  
1.0 detailed specification to RXD pin.  
The serial data is the rate of 31.25kbit/sec (+/-1%) and the unit of 10 bits. The first bit is a start bit, the  
next 8 bits are data (LSB to MSB), and the 10th bit is a stop bit.  
5. Power management functions  
YMF721 (OPL4-ML2) has two types of power management functions as follows.  
(1) Global power down mode  
(2) Suspend/Resume mode  
5-1. Global power down mode  
Generation of clock signal is disabled (stopped). Total power consumption of YMF721 (OPL4-ML2) is  
approximately 20uA (typ.). Writing "FDh" into command register or receiving System Exclusive MIDI  
Message makes in this mode. YMF721 (OPL4-ML2) outputs "L" from /PDOUT pin in this mode,  
which can be used as power down control signal for peripheral equipment. Set KON bit (FM  
synthesizer register) to "0" for all channels before going into this mode. Check that play back of MIDI  
data is stopped.  
/RESETSEL pin has a built-in pull up resistor. When this pin is at "L" in this mode, the power  
consumption is higher by approximately 30uA than the one when this pin is open or at "H".  
5-1-1. ISA BUS Connect System  
When "FDh" has been written into command register, the internal processor goes into the global power  
down mode after performing the following internal processes.  
1) Disabling synthesizer's internal clock  
2) Setting GBUSY bit of status register to "0".  
YMF721 (OPL4-ML2) requires over 30 msec to complete the above processes before going into the  
power down mode.  
Since generation of the clock has been disabled, recovery from the power down mode can not be made  
by using command. Thus, it is necessary to use PDY and PDX bits of control register for the recovery.  
To resume normal operation through the recovery sequence, waiting time of 50 to 100 msec is required  
before the oscillation of crystal stabilizes when internal oscillation is used, or 3 msec or more before  
the recovery of clock generated in the synthesizer.  
For the details of power down command, refer to 6-3. After the power down command, FDh, has been  
written, do not write any command before sending a recovery command to the control register to return  
to the normal mode.  
July 10, 1997  
- 11 -  
YMF721  
<Power Down in>  
<Power Down out>  
Command write “FDh”  
Synthesizer clock disable  
Control write PDY=1, PDX=0  
(wait time ~100 msec)  
Control write PDY=0, PDX=0  
Synthesizer clock enable  
~30msec  
~3msec  
Status read GBUSY=0  
all clock (X’tal)disable  
Normal Operation  
Power down sequence when connected with ISA bus  
5-1-2. No ISA BUS Connect System  
When YMF721 (OPL4-ML2) is not connected with ISA bus, power down operation can be controlled  
by sending Yamaha's original System Exclusive Message as the MIDI data. The System Exclusive  
Message includes the following three byte ID.  
43h, 79h, 04h : Yamaha YMF721(OPL4-ML2) ID  
The System Exclusive Message is as follows.  
F0h, <Yamaha YMF721(OPL4-ML2) ID>, <Command>, <Data>, F7h  
YMF721 (OPL4-ML2) supports the following commands and data.  
Command  
Data  
Function  
Power Down Command  
0Eh  
0Fh  
6Dh  
6Bh  
Internal Micro-processor Reset Command  
July 10, 1997  
- 12 -  
YMF721  
<Power Down Sequence>  
(1) Power Down in  
When YMF721 (OPL4-ML2) has received the System Exclusive Message shown above, it goes  
into the global power down mode after performing the processes as described in "5-1-1. ISA  
BUS Connect System".  
(2) Power Down out  
Since the clock generation has been disabled, YMF721 (OPL4-ML2) is not able to recover from  
the global power down mode by using the System Exclusive Message. Thus, the LSI needs to  
receive the "3byte MIDI data" as shown below to recover from the global power down mode.  
To resume normal operation through the recovery sequence, waiting time of 50 to 100 msec is  
required before the oscillation of crystal stabilizes when internal oscillation is used, or 3 msec or  
more before the recovery of clock generated in the synthesizer.  
<Power Down in>  
<Power Down out>  
System Exclusive : F0h, 43h, 79h, 04h,0Eh, 6Dh, F7h  
receiving MIDI F8h  
(wait time ~100 msec)  
Synthesizer clock disable  
~30msec  
receiving MIDI E0h  
receiving MIDI F8h  
Synthesizer clock enable  
Normal Operation  
all clock (X’tal)disable  
~3msec  
Power down sequence without ISA bus  
<Micro-processor Reset>  
The internal microprocessor is reset by receiving the above System Exchange Message.  
5-2. Suspend/Resume mode  
The state of internal processor is suspended by writing "E0h" into the command register before turning  
off the power. When the power has been turned on, it can be resumed by resetting it, writing "E1h" into  
the command register and then writing data that has been read before suspended.  
On FM synthesizer block, check setting KON bit to "0" for all channels before reading out all register  
and turning off the power. Write register that has been read after turning on and resetting at the  
recovery sequence.  
For the details of suspend/resume, refer to 6-3.  
Note :  
The system that includes YMF721 not connected with ISA bus can not support the suspend/resume function.  
July 10, 1997  
- 13 -  
YMF721  
6. Registers  
6-1. MPU401 compatible register  
MPU401 is a generally used interface for controlling MIDI devices on the personal computer. I/O  
addresses that are compatible with MPU401 are as follows.  
MPU_Base+ 0  
MPU_Base + 1  
MPU_Base + 1  
(W/R)  
(R)  
MIDI Data transmit/acknowledge port  
Status Register port  
(W)  
Command Register port  
MIDI Data Write Port (WO):  
port  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
MPU_Base + 0  
MIDI Data...  
MIDI Data  
Port for writing MIDI data (transmitting). Transmission of the  
data must be carried out while the transmitter of MIDI data is  
watching the state of DRR bit of the status register. An interrupt  
occurs in the internal processor when MIDI data has been  
written into the register. Since YMF721 (OPL4-ML2) has no  
output signal for transmitting MIDI data, the MIDI data written  
into this register is used to operate internal Wavetable  
synthesizer.  
MPU Acknowledge Port (RO):  
port  
D7  
“1”  
D6  
“1”  
D5  
“1”  
D4  
“1”  
D3  
“1”  
D2  
“1”  
D1  
“1”  
D0  
“0”  
MPU_Base + 0  
Sends acknowledge for the operation of MPU401.  
When operation of the MPU401 is normal, "FEh" is read from this port.  
Status Register Port (RO):  
port  
D7  
D6  
D5  
“1”  
D4  
“1”  
D3  
“1”  
D2  
“1”  
D1  
“1”  
D0  
“1”  
MPU_Base + 1  
DSR...  
DSR  
DRR  
This bit is "1" when reading the acknowledge from MPU401.  
This bit is "0" when writing commands.  
DRR...  
This bit is "1" while MIDI data is being written into MPU Data  
Write port (MPU Base+0). This bit is "0" when the MIDI data  
can be written into the MPU Data Write port. Do not write  
MIDI data when this bit is "1".  
Default : BFh  
Command Register Port (WO):  
port  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
MPU_Base + 1  
COMMAND Data  
COMMAND Data...  
The data written into this register is ignored. DSR bit is set to  
"0" when data is written into this register.  
July 10, 1997  
- 14 -  
YMF721  
6-2. Command/Response register  
I/O port for power down and suspend/resume register is described here.  
Command/Response Port (R/W):  
port  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
OPL_Base + 6  
OPL_Base + 6  
Command Write  
Response Read  
Command Write...  
Response Read...  
An interrupt occurs when data has been written into this register.  
Response to a command is read from this register.  
Note :  
For the details of Command/Response, refer to 6-3.  
6-3. Details of command register  
Some of commands supported in the command register are as follows.  
Function  
Command Sub Command Command Length Response Length  
E0h  
E1h  
FDh  
FEh  
FFh  
-
1 byte  
variable  
1 byte  
1 byte  
1 byte  
variable  
Reading suspend information  
Resume  
00h  
-
-
-
-
-
-
-
Moving into power down mode  
Checking operating conditions  
Discontinuing command execution  
6-3-1. Suspend information  
Command and response have the following formats.  
Command  
Response  
FFh  
E0h  
Command byte  
Response 1st byte  
data length (lower 8bit)  
data length (upper 8bit)  
data  
length L  
length H  
data_0  
...........  
.......  
data_n  
last data  
checksum  
checksum (8 bit)  
Checksum is determined so that lower eight bits of the sum of values from length L to checksum  
becomes "0".  
The state of internal processor immediately before execution of this command can be resumed by  
writing the data that is read into the internal processor by using resume command described below.  
July 10, 1997  
- 15 -  
YMF721  
6-3-2. Resume  
Command and Response have the following formats.  
Command  
E1h  
Response  
None  
Command byte  
Sub Command  
data  
0x00  
data_0  
..........  
.......  
data_n  
checksum  
last data  
checksum  
For Resume, data following the sub command are transmitted as seven bit data. Thus, it is necessary  
to send the data obtained with suspend command to the internal processor after encoding it.  
Checksum is determined so that the result of logical product (AND) of 7Fh and the sum of sub  
command byte, encoded data and checksum becomes "0". The internal processor returns to the state  
immediately before execution of Command E0h when it confirms that the data has been received  
normally.  
6-3-3. Others  
YMF721(OPL4-ML2) can use the following special commands that do not send response.  
1) Command FDh : Power down mode  
Refer to 5-1.  
When the power down command FDh has been written into the command register, do not write  
any command before the return command to the control register has been executed.  
2) Command FEh : Checking operating state of internal processor  
This command is used to check if the internal processor is operating normally.  
The internal processor is deemed operating normally if GBUSY bit of Status register is "0".  
3) Command FFh : Discontinuing command execution  
This command is used to discontinue the execution of a command. This command can be used  
only when another command is being executed.  
July 10, 1997  
- 16 -  
YMF721  
6-4. Control/Status register  
I/O port for Control/Status register is described here.  
Control/Status Port (R/W):  
port  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
“0”  
D0  
“1”  
OPL_Base + 7(W)  
OPL_Base + 7(R)  
PDY  
PDY  
PDX  
PDX  
-
-
-
-
-
MPR  
BSEL  
RESP  
GBUSY GDRQ  
PDY, PDX...  
YMF721 recovers from power down mode by using the  
following sequence.  
PDY=“1”, PDX=“0”  
¯ wait time (in case of using crystal oscillation)  
PDY=“0”, PDX=“0”  
D7 and D6 bits of Status register become "1" during power  
down mode. In this state, oscillation of clock can be confirmed  
by monitoring the status bit during power down mode in/out  
sequence.  
MPR...  
Setting this bit to "0" initializes internal processor. Default  
value of this bit is "1".  
BSEL...  
This bit shows connection of internal bus of YMF721(OPL4-  
ML2). Default value of this bit is "1".  
“1” : Connecting synthesizer and internal processor  
“0” : Connecting synthesizer and ISA bus  
Indicates that a response to a command has been received.  
Flag bit that indicates if data can be written into Command write  
register.  
RESP...  
GBUSY...  
“1” : BUSY  
“0” : Data can be written  
GDRQ...  
Flag bit that indicates if data can be read from Response  
register.  
“1” : READY  
“0” : Reading is inhibited  
Default : (00x1 x000)b0  
July 10, 1997  
- 17 -  
YMF721  
6-5. FM synthesizer registers  
6-5-1. Status register  
Status Register (RO):  
port  
D7  
D6  
D5  
D4  
-
D3  
-
D2  
-
D1  
LD  
D0  
OPL_Base + 0  
IRQ  
FT1  
FT2  
BUSY0  
Note :  
Since NEW2 (index 05h of Register array1) = 1 in default state, both LD and BUSY0 bits are valid.  
(LD and BUSY0 bits are invalid when NEW2=0.) BUSY0 is a BUSY flag for both FM and  
Wavetable registers.  
6-5-2. Data register  
Data Register Array 0 (R/W):  
Index  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
00 - 01h  
02h  
LSI TEST  
TIMER 1  
TIMER 2  
03h  
04h  
RST  
-
MT1  
NTS  
VIB  
MT2  
-
-
-
-
-
-
-
ST2  
-
ST1  
-
08h  
20 - 35h  
40 - 55h  
60 - 75h  
80 - 95h  
A0 - A8h  
B0 - B8h  
BDh  
AM  
EGT  
KSR  
MULT  
KSL  
TL  
AR  
SL  
DR  
RR  
F-NUM (L)  
-
-
KON  
RHY  
CHB  
-
BLOCK  
SD  
F-NUM (H)  
DAM  
CHD  
-
DVB  
CHC  
-
BD  
CHA  
-
TOM  
FB  
TC  
HH  
C0 - C8h  
E0 - F5h  
CNT  
-
WS  
July 10, 1997  
- 18 -  
YMF721  
Data Register Array 1 (R/W)  
Index  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
00 - 01h  
04h  
LSI TEST  
CONNECTION SEL  
NEW3  
-
-
-
-
05h  
-
-
-
NEW2  
NEW  
20 - 35h  
40 - 55h  
60 - 75h  
80 - 95h  
A0 - A8h  
B0 - B8h  
C0 - C8h  
E0 - F5h  
AM  
VIB  
EGT  
KSR  
MULT  
KSL  
TL  
AR  
SL  
DR  
RR  
F-NUM (L)  
-
CHD  
-
-
CHC  
-
KON  
CHB  
-
BLOCK  
F-NUM (H)  
CNT  
CHA  
-
FB  
-
WS  
Default :  
After initial clear, all the bits of Register Array 1 are cleared to "0" except NEW2 and NEW3 bits of  
index 05h, and CHA and CHB bits of index C0-C8h.  
For the details of these registers, refer to data sheet for YMF289B(OPL3-L).  
Note :  
Since NEW2 and 3 (at index 05h of Register array1) = 1 in default state, both LD and BUSY0 bits  
are valid. (LD and BUSY0 bits are invalid when NEW2=0.) BUSY0 is a BUSY flag for both FM  
and Wavetable registers.  
July 10, 1997  
- 19 -  
YMF721  
6-6. Wavetable synthesizer register  
6-6-1. Status register  
Status Register (RO):  
port  
D7  
-
D6  
-
D5  
-
D4  
-
D3  
-
D2  
-
D1  
LD  
D0  
OPL_Base + 4  
BUSY1  
6-6-2. Data register  
Data Register (R/W):  
Index  
D7  
D6  
D5  
D4  
LSI TEST  
TONE HEADER  
Memory Address (MA21-16)  
Memory Address (MA15-8)  
D3  
D2  
D1  
D0  
00 - 01h  
02h  
DEVICE ID (“0” “1” “0”)  
MTYPE  
MODE  
03h  
04h  
05h  
Memory Address(MA7-0)  
Memory Data(MD7-0)  
TONE NUMBER (L)  
F-NUMBER (L)  
06h  
08-1Fh  
20-37h  
38-4Fh  
50-67h  
TNUM (H)  
F-NUMBER (H)  
BLOCK  
PREV  
TOTAL LEVEL  
LDIR  
68-7Fh KEYON  
DAMP LFORST  
CH  
PAN POT  
VIB  
80-97h  
98-AFh  
B0-C7h  
C8-DFh  
E0-F7h  
F8h  
CHORUS SEND  
LFO  
AR  
DL  
D1R  
D2R  
RR  
RATE INTERPOLATION  
REVERB SEND  
-
-
AM  
-
-
-
-
-
-
-
-
MIX CONTROL (FM-R)  
MIX CONTROL (FM-L)  
F9h  
MIX CONTROL (Wave-R)  
MIX CONTROL (Wave-L)  
FAh  
-
-
-
-
-
-
-
-
-
-
ATC  
-
FBh  
Default :  
After initial clear, index 02h becomes 40h (Device ID) and index F8h becomes 2Dh (-15dB), and all  
the other registers are cleared to "0". For the details of these registers, refer to data sheet for  
YMF295(OPL4-D).  
Note :  
BUSY1 is a BUSY flag for Wavetable registers. Wavetable status/Data register is normally accessed  
by the internal processor.  
July 10, 1997  
- 20 -  
YMF721  
7. Hardware  
7-1. ISA bus interface  
(1) Data Bus Connect System  
Data BUS  
Since driving current of data bus, ADB7-0 pins, of YMF721(OPL4-ML2) is about 2 mA (at VDD =  
5.0 V), it is recommended to use bus buffer such as LS245 as necessary. At this time, connect ABDIR  
pin which outputs bus direction signal of YMF721(OPL4-ML2) with DIR (direction) pin of the bus  
buffer such as LS245.  
RESET  
Reset (RST) pin of YMF721(OPL4-ML2) can be made "H" active or "L" active. When using "H"  
active reset, /RESETSEL pin should be open or set to "H", or to "L" when using "L" active reset.  
/RESETSEL pin has a built-in pull-up resistor. When this pin is set to "L", the power consumption  
increases approximately by 30uA from the one obtained when the pin is open or set to "H".  
I/O Channel Ready  
In normal operation, the internal data bus of YMF721 (OPL4-ML2) connects the built-in processor  
and FM/Wavetable synthesizer blocks. Every time the ISA bus accesses the register for  
FM/Wavetable, an internal arbitration circuit causes the internal bus to connect ISA bus and  
FM/Wavetable synthesizer blocks. YMF721 (OPL4-ML2) uses I/O channel ready (ARDY pin) as the  
internal arbitration circuit. Connect ARDY pin of YMF721 (OPL4-ML2) and IOCHRDY pin of ISA  
bus. Although ARDY pin is an open drain output, it is not necessary to attach pull up resistor because  
it is usually pulled up at the ISA bus.  
(2) No Data Bus Connect System  
The input pins ADB7-0, A2-0, /MPUCS, /OPLCS, /IOW and /IOR must be pulled up externally.  
Output pins AIRQ, ABDIR and ARDY pins must be open.  
7-2. MIDI interface  
When using MPU port of YMF721 (OPL4-ML2), RXD and FSP pins must be pulled up. When using  
MPU port of the system and receiving MIDI data through RXD pin, FSP pin must be made "L".  
7-3. Serial audio interface  
YMF721 (OPL4-ML2) outputs clock signals of CLKO (384 fs = 16.9344 MHz), BCO (48 fs =  
2.1168 MHz), LRO (fs = 44.1 kHz) and WCO (2 fs = 88.2 kHz) as the serial audio interface. It also  
outputs four types of data including DO0 (FM external out), DO1 (Wavetable external out), DO2  
(MIX out) and DO3 (effect-send out). Normally, it uses the output of DO2. When YMF721 (OPL4-  
ML2) is in power down mode, /PDOUT pin outputs "L" which can be used as the power down control  
signal for peripheral systems.  
July 10, 1997  
- 21 -  
YMF721  
7-4. Others  
Power Supply  
It is recommended to install a line noise filter in the YMF721 (OPL4-ML2). Be sure to install 0.1uF  
ceramic capacitor between each of VDD pins and VSS pins as close to the pins as possible, especially  
the pin No. 63 (VDD).  
5V/3V  
When operating YMF721 (OPL4-ML2) with 5 V, 5V/3V pin must be pulled up. When operating it  
with 3.3 V, set the pin to "L".  
XI, XO  
YMF721 (OPL4-ML2) requires the clock frequency of 33.8688 MHz. This signal can be supplied  
from the system or from the self-oscillation circuit connected with crystal oscillator  
Yamaha recommends either of the following two types of parallel resonance type oscillator  
made by Daishinku Co., Ltd.  
(i) 3rd Overtone Type  
AT-49, SMD-49 : R=5.6K, c1=c2=10pF  
(ii) Fundamental Type  
AT-49, SMD-49 : R=1M, c1=c2=5pF  
Use of the Crystal oscillator with frequency deviation within 100 ppm is recommended. Length of  
wiring lead from XI and XO pin to each component (crystal, resistor and capacitor) should be 0.5  
inch or less respectively and the circuit pattern should be shielded on its periphery to minimize effect  
on the peripheral devices.  
YMF721(OPL4-ML2)  
99  
100  
XO  
XI  
33.8688MHz  
R
c1  
c2  
Since YMF721 (OPL4-ML2) is able to use power down mode, the power consumption can be  
minimized when generation of the clock signal is discontinued during this mode.  
July 10, 1997  
- 22 -  
YMF721  
Electrical Characteristics  
Absolute Maximum Ratings  
Item  
Power Supply Voltage (Analog/Digital)  
Input Voltage  
Symbol  
VDD  
Minimum  
VSS-0.5  
VSS-0.5  
VSS-0.3  
-20  
Maximum  
VSS+7.0  
VDD+0.5  
VDD+0.3  
20  
Unit  
V
VIN  
V
Output Voltage  
VOUT  
IIN  
V
Input Current  
mA  
°C  
Storage Temperature  
TSTG  
-50  
125  
Notes : VDD=DVDD=AVDD, VSS=DVSS=AVSS=0[V]  
Recommended Operating Conditions  
Item  
Symbol  
VDD1  
VDD2  
TOP  
Min.  
4.75  
3.00  
0
Typ.  
5.00  
3.30  
25  
Max. Unit  
Operating voltage 1 (5.0V Spec. 5V/3V=“H”)  
Operating voltage 2 (3.3V Spec. 5V/3V=“L”)  
Operating Ambient Temperature  
5.25  
3.60  
70  
V
V
°C  
Notes : DVSS=AVSS=0[V]  
DC Characteristics  
Item  
Symbol  
Condition  
Min.  
2.0  
Typ.  
Max. Unit  
V
TTL-Input Pins  
VIH1 Except XI and 5V/3V pins  
VIL1  
High Level Input Voltage 1  
Low Level Input Voltage 1  
CMOS-Input Pins  
0.8  
V
VIH2 Applicable to XI and 5V/3V 0.7VDD  
VIL2  
V
V
High Level Input Voltage 1  
Low Level Input Voltage 1  
Input Leakage Current  
Input Capacitance  
0.2VDD  
10  
IL  
VIN=VSS,VDD  
-10  
mA  
pF  
CI  
10  
/TEST, /TEST2  
Pull up Register  
RU1  
50  
2.4  
400  
0.4  
kW  
/TEST3, /TESTA  
/TESTB, /RESETSEL  
IOH1 = -80mA (5V/3V=“L”)  
High Level Output Voltage 1 VOH1  
V
V
V
V
V
Low Level Output Voltage 1 VOL1 IOL1 = 2mA (*1)  
High Level Output Voltage 2 VOH2  
Low Level Output Voltage 2 VOL2 IOL2 = 2mA (*1)  
IOH2 = -80mA (5V/3V=“H”)  
VDD-1.0  
VSS+0.4  
0.4  
Low Level Output Voltage 3  
Low Level Output Voltage 4  
Output Capacitance  
VOL IOL1 = 4mA (5V/3V=“L”)  
IOL2 = 2mA (*2)  
VOL IOL1 = 12mA (5V/3V=“H”)  
IOL2 = 2mA (*2)  
0.4  
10  
V
CO  
pF  
Notes : VSS=0[V], TOP=0~70°C, VDD=5.0±0.25[V]  
*1) Applicable to output pins except XO and /ARDY.  
*2) Applicable to /ARDY pin.  
July 10, 1997  
- 23 -  
YMF721  
AC Characteristics  
1. CPU interface (Refer to Fig. 1, 2, 3)  
Item  
Symbol  
tAS  
Min.  
30  
Typ.  
Max.  
Unit  
ns  
Address set up to /IOW, /IOR active  
Address hold to /IOW, /IOR inactive  
/IOW Write Pulse Width  
tAH  
10  
ns  
tWW  
tWDS  
tWDH  
tRW  
50  
ns  
Write Data set up to /IOW active  
Write Data hold to /IOW inactive  
/IOR Read Pulse Width  
10  
ns  
10  
ns  
80  
ns  
Read Data access time  
tACC  
tRDH  
tCS  
60  
ns  
Read Data hold from /IOR inactive  
Chip select setup time  
10  
5
ns  
ns  
Chip select hold time  
tCH  
10  
100  
ns  
RESET Pulse Width  
tRST  
ms  
Notes : VSS=0[V], TOP=0~70°C, VDD=5.0±0.25[V]  
2. Serial audio interface (Refer to Fig. 4.)  
Item  
CLKO frequency  
Symbol  
fCLKO16  
DCLKO16  
fBCK  
Condition  
Min.  
Typ.  
Max. Unit  
-
40  
-
16.9344  
50  
-
60  
-
MHz  
%
CLKO duty  
BCO frequency  
BCO duty  
2.1168  
50  
MHz  
%
DBCLK  
tDS  
40  
-
60  
-
Serial data setup time  
Serial data hold tim  
LRO setup time  
LRO hold time  
WCO setup time  
WCO hold time  
BCO /DO3-0  
BCO ¯ /DO3-0  
BCO /LRO  
BCO ¯ /LRO  
BCO /WCO  
BCO ¯ /WCO  
118  
ns  
tDH  
-
118  
-
ns  
tLRS  
-
118  
-
ns  
tLRH  
-
118  
-
ns  
tWCS  
-
118  
-
ns  
tWCH  
-
118  
-
ns  
Notes : VSS=0[V], TOP=0~70°C, VDD=5.0±0.25[V]  
Sampling frequency (fs) is 44.1 kHz. Duty factor is measured at 1/2 VDD  
3. Others  
Item  
Symbol  
f33  
Condition  
VDD=5.0±0.25[V]  
VDD=3.3±0.3[V]  
VDD=5.25[V]  
Min.  
40  
Typ.  
Max. Unit  
MHz  
Master Clock Frequency  
(X’tal 33) Duty  
33.8688  
50  
Df33  
IOP1  
60  
50  
30  
50  
30  
%
Power Consumption  
40  
mA  
mA  
mA  
(during normal operation)  
Power Consumption  
IOP2  
25  
VDD=3.60[V]  
IOP3  
25  
VDD=5.25[V]  
(during power down mode)  
IOP4  
15  
mA  
VDD=3.60[V]  
Notes : VSS=0[V], TOP=0~70°C  
/RESETSEL = "H". Duty factor is measured at 1/2 VDD  
July 10, 1997  
- 24 -  
YMF721  
I/ O write cycle  
tAS  
tAH  
A2-0  
/***CS  
/IOW  
Valid  
tCS  
tCH  
tWW  
tWDS  
tWDH  
ADB7-0  
Fig.1  
I/ O read cycle  
tAS  
tAH  
A2-0  
Valid  
tCS  
tCH  
/***CS  
/IOR  
tRW  
tACC  
tRDH  
ADB7-0  
Valid  
Fig.2  
July 10, 1997  
- 25 -  
YMF721  
Reset pu lse width  
tRST  
RESET  
Fig.3  
Serial au dio in terface  
1/fBCK  
BCO  
DO3-0  
LRO  
tDS  
tDH  
tLRH  
tLRS  
tWCH  
tWCS  
WCO  
Fig.4  
July 10, 1997  
- 26 -  
YMF721  
Supplementary Information 1 (about commands)  
The following commands are used to check existence and identification of YMF704C/721(OPL4-  
ML/ML2) by using device driver.  
Function  
Command Sub Command Command Length Response Length  
80h  
80h  
80h  
81h  
82h  
82h  
00h  
01h  
02h  
00h  
00h  
01h  
3byte  
3byte  
3byte  
3byte  
3byte  
3byte  
11byte  
5byte  
6byte  
8byte  
31byte  
5byte  
Get Processor Device ID  
Get Processor Software Version  
Get Processor Software Capacity  
Get OPL4-MLx Information  
Get wave ROM Copyright Data  
Get wave ROM Version  
Command 80h  
This command is used mainly to obtain version information of the internal processor. The device  
driver is able to know capability of the internal processor before it controls the hardware.  
Sub Command 00h : Get Processor Device ID  
Command  
80h  
Response  
8Ah  
Command byte  
Sub Command  
Check sum  
Response 1st byte  
00h  
47h ”G”  
4Dh “M”  
50h “P”  
5Fh “_”  
4Fh “O”  
50h “P”  
4Ch “L”  
34h “4”  
00h  
00h  
ID Strings  
Strings Last Code  
Check sum  
1Eh  
The character string "GMP_OPL4" is read from ID strings. Existence of YMF721 (OPL4-ML2) can  
be confirmed with this character string.  
July 10, 1997  
- 27 -  
YMF721  
Sub Command 01h : Get Processor Software Version  
Command  
80h  
Response  
84h  
Command byte  
Sub Command  
Check sum  
Response 1st byte  
01h  
02h  
Integer part of version number  
1st decimal place of version number  
2nd decimal place of version number  
Check sum  
7Fh  
00h  
00h  
7Eh  
Version number of firmware stored in the internal processor is read out as shown below.  
YMF704B(OPL4-ML) : Version 1.22  
YMF704B(OPL4-ML) : Version 1.23  
YMF704C(OPL4-ML) : Version 1.24  
YMF721C(OPL4-ML2) : Version 2.00  
Sub Command 02h : Get Processor Software Capacity  
Command  
80h  
Response  
85h  
Command byte  
Sub Command  
Check sum  
Response 1st byte  
No use  
02h  
00h  
7Eh  
00h  
No use  
00h  
No use  
07h  
Capacity code  
Check sum  
79h  
The capacity of internal processor can be known through the capacity code.  
bit0 = 1 : The synthesizer is able to add effects such as reverb or chorus send level 1.  
bit1 = 1 : Suspend/Resume is supported.  
bit2 = 1 :Power down is supported.  
YMF704B(OPL4-ML) : Capacity Code=01h  
YMF704B(OPL4-ML) : Capacity Code=03h  
YMF704C(OPL4-ML) : Capacity Code=03h  
YMF721C(OPL4-ML2) : Capacity Code=07h  
July 10, 1997  
- 28 -  
YMF721  
Command 81h  
Sub Command 00h : Get OPL4-MLx Information  
Since the synthesizer of YMF721(OPL4-ML2) is the same as YMF295(OPL4-D), the character  
string of "OPL4D" is obtained as described below.  
Command  
81h  
Response  
87h  
Command byte  
Sub Command  
Check sum  
Response 1st byte  
ID Strings  
00h  
4Fh “O”  
50h “P”  
4Ch “L”  
34h “4”  
44h “D”  
00h  
00h  
Strings Last Code  
Check sum  
1Dh  
Command 82h  
These commands are used to know information about the internal Wavetable sample ROM.  
Sub Command 00h : Get Wave ROM Copyright Data  
Command  
82h  
Response  
Command byte  
Sub Command  
Check sum  
9Eh  
Response 1st byte  
Copyright Data  
00h  
00h  
strings  
00h  
46h  
Strings Last Code  
Check sum  
This command is used to know capacity of internal processor. As the strings, character strings of  
"copyright yamaha corporation"(28bytes) are returned.  
Sub Command 01h : Get Wave ROM Version  
Command  
82h  
Response  
84h  
Command byte  
Sub Command  
Check sum  
Response 1st byte  
01h  
01h  
Integer part of version number  
First decimal place of version number  
Second decimal place of version number  
Check sum  
7Fh  
00h  
03h  
7Ch  
This command is used to know version number of internal Wavetable sample ROM.  
YMF704C(OPL4-ML) : Version 1.02  
YMF721C(OPL4-ML2) : Version 1.03  
July 10, 1997  
- 29 -  
YMF721  
Supplementary Information 2 (MIDI Data Format)  
1. General  
1-1. Application  
The following MIDI information applies to the YMF721(OPL4-ML2).  
1-2. Applicable Standards  
MIDI 1.0 Standard  
2. Channel Message  
2-1. Send  
YMF721(OPL4-ML2) has no transmitting function.  
2-2. Receive  
2-2-1. Note On/Off  
This is a message to inform playing information.  
Note On : 9nH kkH vvH  
Note Off : 9nH kkH 00H or 8nH kkH vvH  
*n : MIDI Channel No.  
*kkH : Note No., vvH : Velocity (00 - 7F)  
Received note range = C-2 ~ G8 (Note On only)  
Verocity range = 1 ~ 127  
2-2-2. Control Change  
a) Bank Select  
<BnH> <Control No.> <Data>  
This is a message to select a bank of the designated receiving channel. However, the channel 10 does  
not receive bank select since it is fixed to drum kit.  
The normal voice is selected when Bank Select MSB is “0”, and drum kit when “127”.  
After Bank Select MSB is received, it is necessary to receive Program Change.  
Control No.  
Parameter  
Data range  
0 or 127  
0
Bank Select MSB  
Bank Select LSB  
32  
don’t care  
b) Modulation  
This is a message to inform the depth of Vibrato.  
Control No.  
1
Parameter  
Modulation  
Data range  
0 to 127  
July 10, 1997  
- 30 -  
YMF721  
c) Data Entry  
This is a message to set control parameter data designated by RPN (Registered Parameter Number).  
Refer i) RPN for the relation between the parameter of RPN and the setting data.  
Control No.  
Parameter  
Data range  
0 to 127  
6
Data Entry MSB  
Data Entry LSB  
38  
0 to 127  
d) Main Volume  
This is a message to control the volume of each part (MIDI channel).  
Control No.  
7
Parameter  
Data range  
0 to 127  
Main Volume  
e) Pan  
This is a message to control the sound position of each part.  
Control No.  
10  
Parameter  
Panpot  
Data range  
0 to 127  
0 : left, 64 : center, 127 : right  
f) Expression  
This is a message to control the volume of each part during playing sound.  
Control No.  
11  
Parameter  
Expression  
Data range  
0 to 127  
g) Hold  
This is a message to control the sustain pedal.  
When “Hold ON” is received, sound is kept playing even if “Note OFF” is received.  
Control No.  
64  
Parameter  
Hold  
Data range  
0 to 127  
0 to 63 : OFF, 64 to 127 : ON  
h) Sostenuto  
This is a message to control the sostenuto pedal.  
When “Sostenuto ON” is received during playing sound, sound is kept playing until “OFF” is received.  
Control No.  
66  
Parameter  
Sostenuto  
Data range  
0 to 63, 64 to 127  
0 to 63 : OFF, 64 to 127 : ON  
July 10, 1997  
- 31 -  
YMF721  
i) RPN  
This is a message to set Pitch Bend Sensitivity and Tuning of each part.  
After the modified parameter is designated by RPN MSB and RPN LSB, set the parameter value at  
Data Entry.  
Control No.  
100  
Parameter  
RPN LSB  
RPN MSB  
Data range  
0 to 127  
101  
0 to 127  
RPN  
Data Entry  
MSB/LSB  
mmH ---  
MSB/LSB  
00h 00H  
Pitch Bend Sensitivity  
mmH : 00H -18H (0-24 semitone)  
------ : don’t care  
2 octaves in semitone steps  
Set to 2 semitones when powered on  
Master Fine Tuning (-100¢ to 100¢)  
mmH,llH : 00H,00H - 40H,00H - 7FH,7FH  
(-8192*100/8192 to 0 +8192*100/8192¢)  
Master Coarse Tuning (-24 - 0 - +24 semitone)  
mmH : 28H -40H - 58H  
00H 01H  
00H 02H  
mmH llH  
mmH ---  
--- : don’t care  
2-2-3. Program Change  
<CnH> <Program No.>  
This is a message to select a tone (voice) used in each part. GM tone (Bank Select MSB 0) or drum kit  
(Bank Select MSB 127) is received by combination with a Bank Select.  
GM tone : 128 tones (Program No. 0 to 127)  
Drum kit : 9 sets (Program No. 0, 1, 8, 16, 24, 25, 32, 40, 48)  
2-2-4. Pitch Bend  
<EnH> <Data-L> <Data-H>  
This is a message to inform Pitch Bend information of each part.  
Recieving the Pitch Bend message is valid only when GM tone, and invalid when drum kit.  
Parameter  
Data LSB  
Data MSB  
Data range  
0 to 127  
0 to 127  
The resolution is 14 bits (-8192 to 8191).  
2-2-5. Channel After Touch  
<DnH> <Data>  
This is a message to inform a degree of pressure after playing a keyboard.  
July 10, 1997  
- 32 -  
YMF721  
2-2-6. Channel Mode Touch  
a) All Sound Off  
<BnH> <Control No.> < Data>  
When this message is received, all sounds are muted. However, states of channel messages, that are  
Note ON and Hold ON etc., are kept.  
Control No.  
120  
Parameter  
Data range  
0
All Sound Off  
b) Reset All Controllers  
When this message is received, controller etc. of the designated channel are set as shown below:  
Controller  
Pitch Bend Change  
Modulation  
Expression  
Hold  
Reset Value  
±0  
0 (OFF)  
127 (max)  
0 (OFF)  
Sostenuto  
RPN  
0 (OFF)  
No Number selected.  
Control No.  
121  
Parameter  
ResetAll Controllers  
Data range  
0
c) All Note Off  
All Notes, that are ON at the designated channel, become OFF.  
However, when Hold and Sostenuto are ON, the sound is not stopped until they become OFF.  
Control No.  
123  
Parameter  
All Note Off  
Data range  
0
July 10, 1997  
- 33 -  
YMF721  
3. System Realtime Message  
3-1. System Reset  
<FFH>  
Notes of all channels are damped.  
Controllers of all channels become default value.  
3-2. System Exclusive Message  
3-2-1. GM System Level 1 ON  
<F0 7E 7F 09 01 F7>  
3-2-2. XG System ON <F0 43 1n 4C 00 00 7E 00 F7>  
n : Device No. Don’t care.  
When this message is received, Notes of all channels are damped.  
All setting value become default without MIDI Master Tuning.  
3-2-3. MIDI Master Volume  
<F0 7F 7F 04 01 ss tt F7>  
When this message is received, all volumes are set.  
Data range of ss and tt is 0 to 127 (00H to 7FH). However, the value of tt is only valid, and ss is  
ignored.  
00H : Minimum volume, 7FH : Maximum volume  
3-2-4. MIDI Master Tuning  
<F0 43 1n 27 30 00 00 xm xl cc F7>  
n : Device No. Don’t care.  
When this message is received, pitch of all channel are changed at the same time.  
Data range of xm and xl is 0 to 127 (00H to 7FH). However, 8 bits value (0 to 255), that is composed  
of m and l, is valid range.  
128 (ml=80H) : Center, ±1 : up/down by 1¢  
This parameter is ignored at drum kit (channel 10 and bank 127).  
And, this parameter is not reset by System Reset, GM System Level 1 ON and XG System ON.  
3-2-5. Power Down Command  
<F0 43 79 04 0E 6D 7F>  
<F0 43 79 04 0F 6B 7F>  
3-2-6. Internal Micro-Processor Reset Command  
July 10, 1997  
- 34 -  
YMF721  
Supplementary Information 3 (MIDI Implementation Chart)  
Function  
Recognized  
Remarks  
Basic  
Channel  
Default  
1-16  
Changed  
Default  
X
Mode  
3
(Omni off Poly,)  
Messages  
Altered  
3
Modes other than 3 are acceptable.  
3
Note  
0-127  
Number  
True Voice  
Note ON  
Note OFF  
Key’s  
0-127  
Velocity  
O
X
After  
X
Touch  
Channel’s  
O
Pitch Bend  
O
Control  
Change  
0
O
Bank Select MSB  
Modulation  
1
O
6,38  
7
O
Data Entry MSB/LSB  
Main Volume  
Panpot  
O
10  
O
11  
O
Expression  
64  
O
O
Hold  
66  
Sostenuto  
100,101  
O
RPN MSB/LSB  
Program  
Change  
O 0-127  
O 0-127  
True No.  
GM128Voice  
Drum Set (0,1,8,16,24,25,32,40,48)  
GM System Level 1 ON  
XG System ON  
System Exclusive  
O
Master Volume  
Master Tuning  
Power Down Command  
Internal Micro-Processor Reset Command  
Common  
Song Position  
X
X
X
X
O
X
O
O
X
O
Song Select  
Tune  
System  
Real-time  
AUX  
Clock  
Commands  
Local On/Off  
All Sound Off  
All Notes Off  
Active Sense  
Reset  
System Reset (FFH)  
Messages  
All Sound Off (Control No. 120)  
All Notes Off (Control No. 123)  
Reset All Controller (Control No. 121)  
Note : YMF721(OPL4-ML2) has no Transmitting function.  
July 10, 1997  
- 35 -  
YMF721  
Supplementary Information 4 (Melody Voice List)  
Group  
Voice No.  
Voice  
Pitch  
Key Range  
Scale  
PIANO  
voice(00)  
voice(01)  
voice(02)  
voice(03)  
voice(04)  
voice(05)  
voice(06)  
voice(07)  
voice(08)  
voice(09)  
voice(10)  
voice(11)  
voice(12)  
voice(13)  
voice(14)  
voice(15)  
voice(16)  
voice(17)  
voice(18)  
voice(19)  
voice(20)  
voice(21)  
voice(22)  
voice(23)  
voice(24)  
voice(25)  
voice(26)  
voice(27)  
voice(28)  
voice(29)  
voice(30)  
voice(31)  
voice(32)  
voice(33)  
voice(34)  
voice(35)  
voice(36)  
voice(37)  
voice(38)  
voice(39)  
Acoustic Grand Piano  
Bright Acoustic Piano  
Electric Grand Piano  
Honky-tonk Piano  
Electric Piano1  
Electric Piano2  
Harpsichord  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
G#-1 ~ C#7  
Temperament  
A-1 ~ C7  
G#-1 ~ C#7  
A-1 ~ C7  
Clavi.  
Chromatic  
Celesta  
Glockenspiel  
Music Box  
A-1 ~ C8  
A-1 ~ C7  
A-1 ~ G8  
C-2 ~ G8  
C#-2 ~ G8  
C-2 ~ G8  
C#-2 ~ G8  
A-1 ~ C7  
Vibraphone  
Marimba  
Xylophone  
Tubular Bells  
Dulcimer  
Organ  
Drawbar Organ  
Percussive Organ  
Rock Organ  
Church Organ  
Reed Organ  
Accordion  
Harmonica  
Tango Accordion  
Nylon Guitar  
Steel Guitar  
C-2 ~ C7  
A-1 ~ C6  
A-1 ~ C7  
Guitar  
Jazz Guitar  
Clean Guitar  
Muted Guitar  
Overdriven Guitar  
Distortion Guitar  
Guitar Harmonics  
Acoustic Bass  
Finger Bass  
C#-2 ~ G8  
C-2 ~ G8  
A-1 ~ C7  
Bass  
C#-2 ~ G8  
A-1 ~ C7  
C#-2 ~ G8  
A-1 ~ C7  
C#-2 ~ G8  
A-1 ~ C7  
C-2 ~ G8  
Pick Bass  
Fret-less Bass  
Slap Bass1  
Slap Bass2  
Synth Bass1  
Synth Bass2  
July 10, 1997  
- 36 -  
YMF721  
Group  
Voice No.  
Voice  
Pitch  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
Key Range  
Scale  
voice(40)  
voice(41)  
voice(42)  
voice(43)  
voice(44)  
voice(45)  
voice(46)  
voice(47)  
voice(48)  
voice(49)  
voice(50)  
voice(51)  
voice(52)  
voice(53)  
voice(54)  
voice(55)  
voice(56)  
voice(57)  
voice(58)  
voice(59)  
voice(60)  
voice(61)  
voice(62)  
voice(63)  
voice(64)  
voice(65)  
voice(66)  
voice(67)  
voice(68)  
voice(69)  
voice(70)  
voice(71)  
voice(72)  
voice(73)  
voice(74)  
voice(75)  
voice(76)  
voice(77)  
voice(78)  
voice(79)  
voice(80)  
voice(81)  
voice(82)  
voice(83)  
voice(84)  
voice(85)  
voice(86)  
voice(87)  
Violin  
A-1 ~ C7  
Temperament  
Viola  
Cello  
Contrabass  
Tremolo Strings  
Pizzicato Strings  
Harp  
Timpani  
Ensemble  
Brass  
Reed  
String Ensemble1  
String Ensemble2  
Synth Strings1  
Synth Strings2  
Aahs Choir  
Oohs Choir  
Synth Choir  
Orchestra Hit  
Trumpet  
F-2 ~ C7  
A-1 ~ C7  
Trombone  
Tuba  
Muted Trumpet  
French Horn  
Brass Section  
Synth Brass1  
Synth Brass2  
Soprano Sax  
Alto Sax  
C#-2 ~ G8  
A-1 ~ C7  
Tenor Sax  
Baritone Sax  
Oboe  
C1 ~ C7  
A-1 ~ C7  
English Horn  
Bassoon  
Clarinet  
Pipe  
Piccolo  
Flute  
Recorder  
A-1 ~ D#7  
Pan Flute  
A-1 ~ C7  
Blown Bottle  
Shakuhachi  
Whistle  
C-2 ~ G8  
Ocarina  
Lead  
Square Lead  
Sawtooth Lead  
Calliope Lead  
Chiff Lead  
Charang Lead  
Voice Lead  
Fifths Lead  
Bass & Lead  
C#-2 ~ G8  
A-1 ~ C7  
C#-2 ~ G8  
A-1 ~ C7  
C#-2 ~ G8  
July 10, 1997  
- 37 -  
YMF721  
Group  
Voice No.  
Voice  
Pitch  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
A3  
F#3  
A1  
C#3  
**  
Key Range  
Scale  
voice(88)  
voice(89)  
voice(90)  
voice(91)  
voice(92)  
voice(93)  
voice(94)  
voice(95)  
voice(96)  
voice(97)  
voice(98)  
voice(99)  
voice(100)  
voice(101)  
voice(102)  
voice(103)  
voice(104)  
voice(105)  
voice(106)  
voice(107)  
voice(108)  
voice(109)  
voice(110)  
voice(111)  
voice(112)  
voice(113)  
voice(114)  
voice(115)  
voice(116)  
voice(117)  
voice(118)  
voice(119)  
New-Age Pad  
Warm Pad  
Polysynth Pad  
Choir Pad  
A-1 ~ C7  
Temperament  
C#-2 ~ G8  
A-1 ~ C7  
Bowed Pad  
Metallic Pad  
Halo Pad  
Sweep Pad  
FX1 (Rain)  
FX2 (Soundtrack)  
FX3 (Crystal)  
FX4 (Atmosphere)  
FX5 (Brightness)  
FX6 (Goblins)  
FX7 (Echoes)  
FX8 (Sci-Fi)  
Sitar  
C#-2 ~ G8  
Synth Effects  
A-1 ~ C7  
F-2 ~ C6  
A-1 ~ C7  
C-2 ~ G8  
A-1 ~ C#7  
A-1 ~ C7  
C-2 ~ G8  
Ethnic  
Banjo  
Shamisen  
Koto  
Kalimba  
Bagpipe  
A-1 ~ C7  
Fiddle  
Shanai  
Percussive  
Tinkle Bell  
Agogo  
A-1 ~ G7  
A-1 ~ G#7  
A-1 ~ C7  
G-1 ~ C7  
A-1 ~ C7  
Steel Drums  
Wood Block  
Taiko Drum  
Melodic Tom  
Synth Drum  
Reverse Cymbal  
Guitar Fret Noise  
Breath Noise  
Seashore  
50¢/note  
50¢/note  
50¢/note  
50¢/note  
50¢/note  
Temperament  
**  
Sound Effects voice(120)  
voice(121)  
A3  
A3  
**  
C#-2 ~ G8  
A-1 ~ C7  
voice(122)  
20¢/note  
5¢/note  
10¢/note  
10¢/note  
5¢/note  
20¢/note  
voice(123)  
Bird Tweet  
Telephone Ring  
Helicopter  
**  
voice(124)  
**  
voice(125)  
**  
C-1 ~ G8  
A-1 ~ C7  
voice(126)  
Applause  
**  
voice(127)  
Gunshot  
**  
July 10, 1997  
- 38 -  
YMF721  
Supplementary Information 5 (Drum Set List)  
Program #  
1
9
17  
25  
26  
33  
41  
49  
24 C 0  
Seq Click H  
Brush Tap  
O
O
25 C#0  
26 D0  
27 D#0  
28 E0  
29 F0  
30 F#0  
31 G0  
32 G#0  
33 A0  
34 A#0  
35 B0  
36 C1  
37 C#1  
38 D1  
39 D#1  
40 E1  
41 F1  
42 F#1  
43 G1  
44 G#1  
45 A1  
46 A#1  
47 B1  
48 C2  
49 C#2  
50 D2  
51 D#2  
52 E2  
53 F2  
54 F#2  
55 G2  
56 G#2  
57 A2  
58 A#2  
59 B2  
60 C3  
61 C#3  
62 D3  
63 D#3  
64 E3  
65 F3  
66 F#3  
67 G3  
68 G#3  
69 A3  
70 A#3  
71 B3  
72 C4  
73 C#4  
74 D4  
75 D#4  
76 E4  
77 F4  
78 F#4  
79 G4  
80 G#4  
81 A4  
82 A#4  
83 B4  
84 C5  
Brush Swirl L  
Brush Slap  
Brush Swirl H  
Snare Roll  
O
O
Reverse Cymbal Reverse Cymbal  
Castanet  
Hi Q  
Hi Q  
Snare L  
SD Room L SD Power M  
Snare M  
SD Power H  
Brush Slap L Concert SD  
Gran Casa  
Sticks  
Bass Drum L  
Open Rim Shot  
Bass Drum M  
Bass Drum H  
Side Stick  
BD Room L Bass Drum M Bass Drum H  
Bass Drum M  
BD Room M Bass Drum H BD Power  
BD Analog L  
Gran Casa  
Gran Casa  
BD Room H BD Power  
SD Room M SD Rock  
BD Gate  
BD Analog H  
Analog Side Stick  
Analog Snare L  
Snare M  
SD Power L  
Brush Slap  
Brush Tap  
Concert SD  
Hand Clap  
Snare H  
SD Room H SD Power Rim SD Power H  
Room Tom 1 Power Tom 1 E Tom 1  
Analog Snare H  
Analog Tom 1  
Concert SD  
Floor Tom L  
Hi-Hat Closed  
Floor Tom H  
Hi-Hat Pedal  
Low Tom  
Jazz Tom 1 Brush Tom 1 Jazz Tom 1  
Jazz Tom 2 Brush Tom 2 Jazz Tom 2  
Jazz Tom 3 Brush Tom 3 Jazz Tom 3  
Analog HH Closed 1  
Analog Tom 2  
Room Tom 2 Power Tom 2 E Tom 2  
Room Tom 3 Power Tom 3 E Tom 3  
Analog HH Closed 2  
Analog Tom 3  
Hi-Hat Open  
Mid Tom L  
Analog HH Open  
Analog Tom 4  
Room Tom 4 Power Tom 4 E Tom 4  
Room Tom 5 Power Tom 5 E Tom 5  
Jazz Tom 4 Brush Tom 4 Jazz Tom 4  
Jazz Tom 5 Brush Tom 5 Jazz Tom 5  
Mid Tom H  
Crash Cymbal 1  
High Tom  
Analog Tom 5  
Hand Cym.Open L  
Jazz Tom 6 Brush Tom 6 Jazz Tom 6  
Hand Cym.Closed L  
Room Tom 6 Power Tom 6 E Tom 6  
Analog Tom 6  
Ride Cymbal 1  
Chinese Cymbal  
Ride Cymbal Cup  
Tambourine  
Splash Cymbal  
Cowbell  
Crash Cymbal 2  
Vibraslap  
Hand Cym.Open H  
Hand Cym.Closed H  
Ride Cymbal 2  
Bongo H  
Jazz Ride  
Bongo L  
Conga H Mute  
Conga H Open  
Conga L  
Timbale H  
Timbale L  
Agogo H  
Agogo L  
Cabasa  
Maracas  
O
O
Samba Whistle H  
Samba Whistle L  
Guiro Short  
Guiro Long  
Claves  
Wood Block H  
Wood Block L  
Cuica Mute  
Cuica Open  
Triangle Mute  
Triangle Open  
Shaker  
Scratch Push  
Scratch Pull  
Scratch Push  
Scratch Pull  
Jingle Bell  
Bell Tree  
: Same as Standard kit  
July 10, 1997  
- 39 -  
YMF721  
EXTERNAL DIMENSIONS OF PACKAGE  
16.00 ± 0.40  
14.00 ± 0.30  
75  
51  
76  
50  
100  
26  
1
25  
0.20 ± 0.10  
P-0.50TYP  
or 0.18 ± 0.10  
(1.0)  
0-10º  
0.50 ± 0.20  
LEAD THICKNESS : 0.125TYP or 0.15TYP  
The shape of the molded corner may slightly different from the shape  
in this diagram.  
The figure in the parenthesis ( ) should be used as a reference.  
Plastic body dimensions do not include burr of resin.  
UNIT : mm  
Note : LSIs to be installed on the surface of the printed circuit board require special care  
in storage and soldering. Consult your dealer for the details.  
July 10, 1997  
- 40 -  
YMF721  
IMPORTANT NOTICE  
1. Yamaha reserves the right to make changes to its Products and to this document without  
notice. The information contained in this document has been carefully checked and is believed  
to be reliable. However, Yamaha assumes no responsibilities for inaccuracies and makes no  
commitment to update or to keep current the information contained in this document.  
2. These Yamaha Products are designed only for commercial and normal industrial  
applications, and are not suitable for other uses, such as medical life support equipment, nuclear  
facilities, critical care equipment or any other application the failure of which could lead to death,  
personal injury or environmental or property damage. Use of the Products in any such  
application is at the customer's sole risk and expense.  
3. YAMAHA ASSUMES NO LIABILITY FOR INCIDENTAL, CONSEQUENTIAL OR SPECIAL  
DAMAGES OR INJURY THAT MAY RESULT FROM MISAPPLICATION OR IMPROPER USE  
OR OPERATION OF THE PRODUCTS.  
4. YAMAHA MAKES NO WARRANTY OR REPRESENTATION THAT THE PRODUCTS ARE  
SUBJECT TO INTELLECTUAL PROPERTY LICENSE FROM YAMAHA OR ANYTHIRD  
PARTY, AND YAMAHA MAKES NO WARRANTY OR REPRESENTATION OF NON-  
INFRINGEMENT WITH RESPECT TO THE PRODUCTS. YAMAHA SPECIFICALLY  
EXCLUDES ANY LIABILITY TO THE CUSTOMER OR ANY THIRD PARTY ARISING FROM  
OR RELATED TO THE PRODUCTS' INFRINGEMENT OF ANY THIRD PARTY'S  
INTELLECTUAL PROPERTY RIGHTS, INCLUDING THE PATENT, COPYRIGHT,  
TRADEMARK OR TRADE SECRET RIGHTS OF ANY THIRD PARTY.  
5. EXAMPLES OF USE DESCRIBED HEREIN ARE MERELY TO INDICATE THE  
CHARACTERISTICS AND PERFORMANCE OF YAMAHA PRODUCTS. YAMAHA ASSUMES  
NO RESPONSIBILITY FOR ANY INTELLECTUAL PROPERTY CLAIMS OR OTHER  
PROBLEMS THAT MAY RESULT FROM APPLICATIONS BASED ON THE EXAMPLES  
DESCRIBED HEREIN. YAMAHA MAKES NO WARRANTY WITH RESPECT TO THE  
PRODUCTS, EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO THE  
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR USE AND TITLE.  
Note) The specifications of this product are subject to improvement change without prior notice.  
YAMAHA CORPORATION  
Address inquires to :  
AGENCY  
Semi-conductor Sales Department  
- Head Office  
203, MatsunokiJima, Toyooka-mura.  
Iwata-gun, Shizuoka-ken, 438-0192  
Tel. +81-539-62-4918 Fax. +81-539-62-5054  
2-17-11, Takanawa, Minato-ku, Tokyo, 108-8568  
Tel. +81-3-5488-5431 Fax. +81-3-5488-5088  
1-13-17, Namba Naka, Naniwa-ku,  
- Tokyo Office  
- Osaka Office  
Osaka City, Osaka, 556-0011  
Tel. +81-6-6633-3690 Fax. +81-6-6633-3691  
YAMAHA System Technology.  
- U.S.A. Office  
100 Century Center Court, San Jose, CA 95112  
Tel. +1-408-467-2300 Fax. +1-408-437-8791  
July 10, 1997  
- 41 -  
配单直通车
YMF721-S产品参数
型号:YMF721-S
是否无铅: 含铅
是否Rohs认证: 不符合
生命周期:Obsolete
零件包装代码:QFP
包装说明:LFQFP,
针数:100
Reach Compliance Code:unknown
HTS代码:8542.39.00.01
风险等级:5.86
其他特性:CAN ALSO OPERATE AT 5V SUPPLY
商用集成电路类型:SPEECH SYNTHESIZER
JESD-30 代码:S-PQFP-G100
长度:14 mm
湿度敏感等级:1
功能数量:1
端子数量:100
片上内存类型:ROM; SRAM
最高工作温度:70 °C
最低工作温度:
封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP
封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):225
认证状态:Not Qualified
座面最大高度:1.7 mm
最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V
表面贴装:YES
技术:CMOS
温度等级:COMMERCIAL
端子形式:GULL WING
端子节距:0.5 mm
端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:14 mm
Base Number Matches:1
  •  
  • 供货商
  • 型号 *
  • 数量*
  • 厂商
  • 封装
  • 批号
  • 交易说明
  • 询价
批量询价选中的记录已选中0条,每次最多15条。
 复制成功!