Preliminary Data Sheet
August 2000
TRCV012G5 and TRCV012G7
Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer
(continued)
Table 3. Pin Descriptions—Global Signal
Pin
116
Symbol*
RESETN
Type
†
I
u
Level
CMOS
Name/Description
Reset (Active-Low).
Resets all synchronous logic. During
a reset, the true data outputs are in the low state and the
barred data outputs are in the high state.
0 = reset
1 or no connection = normal operation
* Differential pins are indicated by the P and N suffixes. For nondifferential pins, N at the end of the symbol name designates active-low.
† I = input, O = output. I
u
= an internal pull-up resistor on this pin, I
d
= an internal pull-down resistor on this pin, I
t
= an internal termination resis-
tance of 50
Ω
on this pin.
Table 4. Pin Descriptions—Power and No-Connect Signals
Note:
V
CCA,
V
CCLA,
and V
CCD
have the same dc value, which is represented as V
CC
unless otherwise specified.
However, high-frequency filtering is suggested between the individual supplies.
Pin
9, 10, 22, 23
24, 27, 35
8, 42, 45, 48,
56, 59, 71, 76,
81, 89, 94, 99,
106, 109, 112,
127
13, 15, 20, 21
29, 31, 33
1, 7, 36, 38,
39, 49, 52, 55,
64—68, 86,
102, 103, 128
11, 12, 14, 126
Symbol*
V
CCA
V
CCLA
V
CCD
Type
†
I
I
I
Level
Power
Power
Power
Name/Description
Analog Power Supply (3.3 V).
Limiting Amplifier Power Supply (3.3 V).
Digital Power Supply (3.3 V).
GND
I
Ground
Ground.
NC
No Connection.
These pins must be left open.
* Differential pins are indicated by the P and N suffixes. For nondifferential pins, N at the end of the symbol name designates active-low.
† I = input, O = output. I
u
= an internal pull-up resistor on this pin, I
d
= an internal pull-down resistor on this pin, I
t
= an internal termination resis-
tance of 50
Ω
on this pin.
Lucent Technologies Inc.
9
AGERE [ AGERE SYSTEMS ]
