HIGH PERFORMANCE SERIAL INTERFACE CIRCUITS
S2042 Pin Assignment and Descriptions (Continued)
S2042/S2043
Pin Name
OE0
OE1
Level
Static
TTL
TTL
I/O
I
I
Pin #
2
1
18
Description
Active low output-enable control for TX/TY outputs. TX/TY will
go to the logic low state when disabled.
Active low output-enable control for TLX/TLY outputs. TLX/TLY
will go to the logic low state when disabled.
Multilevel input used to select the reference clock frequency.
(See Table 1.)
REFSEL
Static
Multi-
TTL
I
RATESEL
TTL
ECLVCC
TTLGND
TTLVCC
ECLIOVCC
ECLIOVEE
AVCC
AVE E
ECLVEE
+3.3V
GND
+3.3V/
+5V
+3.3V
G ND
+3.3V
GND
GND
I
15
Multilevel input used to select the operating speed of the
transmitter. (See Table 1.)
–
–
–
–
–
–
–
–
21, 39,
45
14
17
3, 10
6, 7
27, 32
26, 33
13, 34,
40, 46,
51, 52
Core +3.3V
TTL Ground
TTL Power Supply (+5V if TTL)
PECL I/O Power Supply
PECL I/O Power Supply
Analog Power Supply
Analog Ground
Core Ground
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6195 Lusk Blvd., San Diego, CA 92121 • (619) 450-9333
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