A617308 Series
Preliminary
Features
n
Single + 5V power supply
n
Access times: 10/12/15 ns (max.)
n
Current: Operating: 150mA (max.)
Standby:
12mA (max.)
n
Full static operation, no clock or refreshing required
n
n
n
n
All inputs and outputs are directly TTL compatible
Common I/O using three-state output
Data retention voltage: 3V (min.)
Available in 32-pin SOJ and TSOP packages
128K X 8 BIT HIGH SPEED CMOS SRAM
General Description
The A617308 is a high-speed, low-power 1,048,576-bit
static random access memory organized as 131,072
words by 8 bits and operates on a single 5V power
supply. It is built using high performance CMOS process.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
Minimum standby power is drawn by this device when
chip enable is disable, independent of the other input
levels.
Data retention is guaranteed at a power supply voltage
as low as 3V.
Pin Configurations
n
SOJ
n
TSOP
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O
0
I/O
1
I/O
2
GND
1
2
3
4
5
6
32
31
30
29
28
27
VCC
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
~
A15
A11
A9
A8
A13
WE
CE2
A15
VCC
NC
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
7
8
9
10
11
12
13
14
15
16
26
25
24
23
22
21
20
19
18
17
A617308V
PRELIMINARY
(January, 2000, Version 0.2)
1
AMIC Technology, Inc.
~
~
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
GND
I/O
2
I/O
1
I/O
0
A0
A1
A2
A3
A617308S
AMICC [ AMIC TECHNOLOGY ]
