0.1µF
REF
P
V
CM
REF
N
0.1µF
0.1µF
13Ω
txLINE+
0.01µF
13Ω
txLINE–
–
Input Antialias Filter
fc
≅
2 x Symbol Rate
750Ω
rxbaudCLK
rx48xCLK
HDSL DSP
Data Out
txbaudCLK
tx48xCLK
Data In
rxHYB–
750Ω
rxLINE–
750Ω
AFE1124
100pF
rxHYB+
Compromise
Hybrid
–
+
+
0.01µF
1:2 Transformer
Tip
Ring
100pF
GNDA
GNDA
GNDA
DV
DD
DV
DD
5V to 3.3V Digital
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
AV
DD
AV
DD
rxLINE+
750Ω
AV
DD
5V Analog
1 - 10µF
FIGURE 6. Basic Connection Diagram.
For the transmit channel, the pulse shape and the power
spectral density scale directly with the clock rate. The power
spectral density shown in Curve 1 and the pulse template
shown in Curve 2 are measured at the output of the trans-
former. The transformer and the RC circuit on the output
provide some smoothing for the output transmission. At
lower bit rates, the amount of smoothing will be less.
RXHYB AND RXLINE INPUT
ANTI-ALIASING FILTERS
An external input antialiasing filter is needed on the hybrid
and line inputs as shown in the Basic Connection Diagram
above. The –3dB frequency of the input anti-aliasing filter
for the rxLINE and rxHYB differential inputs should be
approximately 1MHz for T1 and E1 symbol rates. Suggested
values for the filter are 750Ω for each of the two input
resistors and 100pF for the capacitor. Together the two
750Ω resistors and the 100pF capacitor result in a 3dB
frequency of just over 1MHz. The 750Ω input resistors will
result in minimal voltage divider loss with the input imped-
ance of the AFE1124.
The antialiasing filters will give best performance with 3dB
frequency approximately equal to the bit rate. For instance,
a 3dB frequency of 320kHz may be used for a single line bit
rate of 320k bits per second.
®
9
AFE1124