CAT25010/20/40
clock for SPI modes (0,0 & 1,1).
WP: Write Protect
WP is the Write Protect pin. The Write Protect pin will
allow normal read/write operations when held high.
When WP is tied low all write operations are inhibited.
WP held low while CS is low will interrupt a write to the
CAT25010/20/40. If the internal write cycle has already
been initiated, WP going low will have no effect on any
write operation. Figure 10 illustrates the WP timing
sequence during a write operation.
SCK: Serial Clock
SCKistheserialclockpin.Thispinisusedtosynchronize
the communication between the microcontroller and the
CAT25010/20/40. Opcodes, byte addresses, or data
presentontheSIpinarelatchedontherisingedgeofthe
SCK. Data on the SO pin is updated on the falling edge
of the SCK for SPI modes (0,0 & 1,1) .
CS: Chip Select
HOLD: Hold
CSistheChipselectpin.CSlowenablestheCAT25010/
20/40 and CS high disables the CAT25010/20/40. CS
high takes the SO output pin to high impedance and
forces the devices into a Standby Mode (unless an
internal write operation is underway) The CAT25010/
20/40 draws ZERO current in the Standby mode. A high
to low transition on CS is required prior to any sequence
beinginitiated. AlowtohightransitiononCSafteravalid
write sequence is what initiates an internal write cycle.
The HOLD pin is used to pause transmission to the
CAT25010/20/40whileinthemiddleofaserialsequence
without having to re-transmit entire sequence at a later
time. To pause, HOLD must be brought low while SCK
is low. The SO pin is in a high impedance state during
thetimethepartispaused, andtransitionsontheSIpins
will be ignored. To resume communication, HOLD is
brought high, while SCK is low. (HOLD should be held
highanytimethisfunctionisnotbeingused.) HOLDmay
be tied high directly to VCC or tied to VCC through a
resistor. Figure 9 illustrates hold timing sequence.
STATUS REGISTER
7
1
6
1
5
1
4
1
3
2
1
0
BP1
BP0
WEL
RDY
BLOCK PROTECTION BITS
Status Register Bits
Array Address
Protected
None
Protection
BP1
0
BP0
0
No Protection
0
1
25010: 60-7F
25020: C0-FF
25040: 180-1FF
Quarter Array Protection
Half Array Protection
Full Array Protection
1
1
0
1
25010: 40-7F
25020: 80-FF
25040: 100-1FF
25010: 00-7F
25020: 00-FF
25040: 000-1FF
Doc. No. 1006, Rev. L
5
CATALYST [ CATALYST SEMICONDUCTOR ]
