RS8953B/8953SPB
HDSL Channel Unit
4.0 Registers
4.8 Transmit Bit Stuffing Thresholds
where:
n
= 8 for STF_THRESH_A
n
= 12 for STF_THRESH_B
n
= 24 for STF_THRESH_C
0xCF—Bit Stuffing Threshold A (STF_THRESH_A_LO)
7
6
5
4
3
2
1
0
STF_THRESH_A[7:0]
0xD0—Bit Stuffing Threshold A (STF_THRESH_A_HI)
7
—
6
—
5
—
4
—
3
—
2
—
1
0
STF_THRESH_A[9:8]
STF_THRESH_A[8:0]
Bit Stuffing Threshold
A—Contains the number of GCLK cycles equaling 8 HDSL bit times.
If the phase measured from PCM to HDSL 6 ms frames is a positive value greater than or
equal to STF_THRESH_A, then 4 STUFF bits are inserted in the outgoing HDSL frame. If the
phase is a positive value less then STF_THRESH_A, then STUFF bits are not inserted in the
outgoing HDSL frame. If the phase is a negative value, then the phase tolerance on HDSL,
PCM, or GCLK inputs is exceeded and the STUFF generator reports STUFF_ERR
[STATUS_3; addr 0x07].
0xD1—Bit Stuffing Threshold B (STF_THRESH_B_LO)
7
6
5
4
3
2
1
0
STF_THRESH_B[7:0]
0xD2—Bit Stuffing Threshold B (STF_THRESH_B_HI)
7
—
6
—
5
—
4
—
3
—
2
—
1
0
STF_THRESH_B[9:8]
STF_THRESH_B[8:0]
Bit
Stuffing Threshold B—Contains the number of GCLK cycles equaling 12 HDSL bit
times.
0xD3—Bit Stuffing Threshold C (STF_THRESH_C_LO)
7
6
5
4
3
2
1
0
STF_THRESH_C[7:0]
N8953BDSB
Conexant
4-33