ESMT
PIN Description
Symbol
SCK
SI
Pin Name
Serial Clock
Serial Data Input
Functions
To provide the timing for serial input and
output operations
To transfer commands, addresses or data
serially into the device.
Data is latched on the rising edge of SCK.
To transfer data serially out of the device.
Data is shifted out on the falling edge of
SCK.
To activate the device when CE is low.
The Write Protect (
WP
) pin is used to
enable/disable BPL bit in the status
register.
To temporality stop serial communication
with SPI flash memory without resetting
the device.
To provide power.
F25L004A
SO
CE
WP
Serial Data Output
Chip Enable
Write Protect
HOLD
VDD
VSS
Hold
Power Supply
Ground
SECTOR STRUCTURE
Table1 : F25L004A Sector Address Table
Block
7
Sector
127
:
112
111
:
96
95
:
80
79
:
64
63
:
48
47
:
32
31
:
16
15
:
0
6
5
4
3
2
1
0
Sector Size
(Kbytes)
4KB
:
4KB
4KB
:
4KB
4KB
:
4KB
4KB
:
4KB
4KB
:
4KB
4KB
:
4KB
4KB
:
4KB
4KB
:
4KB
Address range
07F000H – 07FFFFH
:
070000H – 070FFFH
06F000H – 06FFFFH
:
060000H – 060FFFH
05F000H – 05FFFFH
:
050000H – 050FFFH
04F000H – 04FFFFH
:
040000H – 040FFFH
03F000H – 03FFFFH
:
030000H – 030FFFH
02F000H – 02FFFFH
:
020000H – 020FFFH
01F000H – 01FFFFH
:
010000H – 010FFFH
00F000H – 00FFFFH
:
000000H – 000FFFH
Block Address
A18 A17 A16
1
1
1
1
1
0
1
0
1
1
0
0
0
1
1
0
1
0
0
0
1
0
0
0
Elite Semiconductor Memory Technology Inc.
Publication Date: Jan. 2009
Revision: 1.6
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