ESMT
M52D128168A
Preliminary
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
Parameter
CLK cycle time
CLK to valid
output delay
CAS Latency =3
CAS Latency =2
CAS Latency =3
CAS Latency =2
Symbol
t
CC
t
SAC
t
OH
t
CH
t
CL
t
SS
t
SH
t
SLZ
t
SHZ
-7.5
Min
7.5
12
Max
1000
6
9
2.5
2.5
2.5
2
1
1
6
9
2.5
3
3
2
1.5
1
Min
10
12
-10
Max
1000
7
10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Note
1
1
2
3
3
3
3
2
Output data hold time
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output in
Hi-Z
CAS Latency =3
CAS Latency =2
7
ns
10
*All AC parameters are measured from half to half.
Note:
1.Parameters depend on programmed CAS latency.
2.If clock rising time is longer than 1ns,(tr/2-0.5)ns should be added to the parameter.
3.Assumed input rise and fall time (tr & tf)=1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered, i.e., [(tr+ tf)/2-1]ns should be added to the
parameter.
Elite Semiconductor Memory Technology Inc.
Publication Date: May. 2007
Revision: 1.0
7/47
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
