CMP1617BAx-E
3. Deep Power Down Mode Entry/Exit
tWC
CMOS LPRAM
A4
tAS(3)
tCW(2
)
tAW
tWR(4
)
/CS
/UB, /LB
/WE
tZZWE
tBW
tWP(1)
tR
tZZmin
Next
Cycle
/ZZ
Register
Write(DPD)
Deep Power
down start
Deep Power
down exit
Parameter
tZZWE
tR(Deep Power Down Mode only)
tZZmin
Description
ZZ low to Write Enable Low
Operation Recovery Time
Low Power Mode Time
Min
0
200
10
Max
1
-
-
Units
us
us
us
4. Address Information
Partial Array Refresh Mode (A3=0, A4=1)
A2
0
0
X
1
1
A1,A0
11
10
00
11
10
Refresh Section
1/4
1/2
Full
1/4
1/2
Address
00000h-3FFFFh
00000h-7FFFFh
00000h-FFFFFh
C0000h-FFFFFh
80000h-FFFFFh
Size
256Kbx16
512Kbx16
1Mbx16
256Kbx16
512Kbx16
Density
4Mb
8Mb
16Mb
4Mb
8Mb
Reduced Memory Size Mode (A3=1, A4=1)
A2
0
0
1
1
A1,A0
11
10
11
10
Refresh Section
1/4
1/2
1/4
1/2
Address
00000h-3FFFFh
00000h-7FFFFh
C0000h-FFFFFh
80000h-FFFFFh
Size
256Kbx16
512Kbx16
256Kbx16
512bx16
Density
4Mb
8Mb
4Mb
8Mb
11
Revision 0.5
Jul. 2006
FIDELIX [ FIDELIX ]
