Freescale Semiconductor, Inc.
System Integration Module (SIM)
Low-Power Modes
IAB
WAIT ADDR
WAIT ADDR + 1
SAME
SAME
IDB
PREVIOUS DATA
NEXT OPCODE
SAME
SAME
R/W
Note: Previous data can be operand data or the WAIT opcode, depending on the last instruction.
Figure 9-12. Wait Mode Entry Timing
IAB
$6E0B
$6E0C
$00FF
$00FE
$00FD
$00FC
Freescale Semiconductor, Inc...
IDB
$A6
$A6
$A6
$01
$0B
$6E
EXITSTOPWAIT
Note: EXITSTOPWAIT =
RST
pin or CPU interrupt OR break interrupt
Figure 9-13. Wait Recovery from Interrupt or Break
32
CYCLES
IAB
$6E0B
32
CYCLES
RSTVCT H
RSTVCTL
IDB
$A6
$A6
$A6
RST
CGMXCLK
Figure 9-14. Wait Recovery from Internal Reset
9.7.2 Stop Mode
In stop mode, the SIM counter is reset and the system clocks are
disabled. An interrupt request from a module can cause an exit from stop
mode. Stacking for interrupts begins after the selected stop recovery
time has elapsed. Reset or break also causes an exit from stop mode.
MC68HC908AS60 — Rev. 1.0
System Integration Module (SIM)
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Technical Data
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
